diff mbox series

[v2,4/4] dt-bindings: timer: atmel,at91rm9200-st: convert to yaml

Message ID 20230529062604.1498052-5-claudiu.beznea@microchip.com
State New
Headers
Series dt-bindings: timer: Microchip AT91 convert to YAML |

Commit Message

Claudiu Beznea May 29, 2023, 6:26 a.m. UTC 
  Convert Microchip AT91 system timer to YAML.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 .../devicetree/bindings/arm/atmel-sysregs.txt |  9 ---
 .../bindings/timer/atmel,at91rm9200-st.yaml   | 65 +++++++++++++++++++
 2 files changed, 65 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml

Comments

Conor Dooley May 29, 2023, 12:24 p.m. UTC | #1 
Hey Claudiu,

On Mon, May 29, 2023 at 09:26:04AM +0300, Claudiu Beznea wrote:
> Convert Microchip AT91 system timer to YAML.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>  .../devicetree/bindings/arm/atmel-sysregs.txt |  9 ---
>  .../bindings/timer/atmel,at91rm9200-st.yaml   | 65 +++++++++++++++++++
>  2 files changed, 65 insertions(+), 9 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index 54d3f586403e..68c0eacb01ac 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -4,15 +4,6 @@ Chipid required properties:
>  - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
>  - reg : Should contain registers location and length
>  
> -System Timer (ST) required properties:
> -- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
> -- reg: Should contain registers location and length
> -- interrupts: Should contain interrupt for the ST which is the IRQ line
> -  shared across all System Controller members.
> -- clocks: phandle to input clock.
> -Its subnodes can be:
> -- watchdog: compatible should be "atmel,at91rm9200-wdt"
> -
>  RAMC SDRAM/DDR Controller required properties:
>  - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
>  			"atmel,at91sam9260-sdramc",
> diff --git a/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
> new file mode 100644
> index 000000000000..a75644e1a2fe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/atmel,at91rm9200-st.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip AT91 System Timer (ST)
> +
> +maintainers:
> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
> +  - Alexandre Belloni <alexandre.belloni@microchip.com>

Is that a valid email address?

> +  - Claudiu Beznea <claudiu.beznea@microchip.com>
> +
> +description:
> +  Microchip AT91 system timer integrates a period interval timer, a watchdog
> +  timer and a real-time timer.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: atmel,at91rm9200-st
> +      - const: syscon
> +      - const: simple-mfd
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    description:
> +      Contain interrupt for the ST which is the IRQ line shared across all
> +      system controller members.

I don't think there's really much point having a description when there
is only one interrupt, but it cannot do any harm I suppose!

Other than the email address question,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  watchdog:
> +    $ref: ../watchdog/atmel,at91rm9200-wdt.yaml
> +    description:
> +      Child node describing watchdog.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    st: timer@fffffd00 {
> +        compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
> +        reg = <0xfffffd00 0x100>;
> +        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> +        clocks = <&slow_xtal>;
> +
> +        watchdog {
> +            compatible = "atmel,at91rm9200-wdt";
> +        };
> +    };
> +
> +...
> -- 
> 2.34.1
>
Claudiu Beznea May 29, 2023, 12:34 p.m. UTC | #2 
On 29.05.2023 15:24, Conor Dooley wrote:
> Hey Claudiu,
> 
> On Mon, May 29, 2023 at 09:26:04AM +0300, Claudiu Beznea wrote:
>> Convert Microchip AT91 system timer to YAML.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> ---
>>  .../devicetree/bindings/arm/atmel-sysregs.txt |  9 ---
>>  .../bindings/timer/atmel,at91rm9200-st.yaml   | 65 +++++++++++++++++++
>>  2 files changed, 65 insertions(+), 9 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> index 54d3f586403e..68c0eacb01ac 100644
>> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
>> @@ -4,15 +4,6 @@ Chipid required properties:
>>  - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
>>  - reg : Should contain registers location and length
>>  
>> -System Timer (ST) required properties:
>> -- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
>> -- reg: Should contain registers location and length
>> -- interrupts: Should contain interrupt for the ST which is the IRQ line
>> -  shared across all System Controller members.
>> -- clocks: phandle to input clock.
>> -Its subnodes can be:
>> -- watchdog: compatible should be "atmel,at91rm9200-wdt"
>> -
>>  RAMC SDRAM/DDR Controller required properties:
>>  - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
>>  			"atmel,at91sam9260-sdramc",
>> diff --git a/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
>> new file mode 100644
>> index 000000000000..a75644e1a2fe
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
>> @@ -0,0 +1,65 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/timer/atmel,at91rm9200-st.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip AT91 System Timer (ST)
>> +
>> +maintainers:
>> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
>> +  - Alexandre Belloni <alexandre.belloni@microchip.com>
> 
> Is that a valid email address?

Indeed, this is wrong, thanks for pointing it.

> 
>> +  - Claudiu Beznea <claudiu.beznea@microchip.com>
>> +
>> +description:
>> +  Microchip AT91 system timer integrates a period interval timer, a watchdog
>> +  timer and a real-time timer.
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - const: atmel,at91rm9200-st
>> +      - const: syscon
>> +      - const: simple-mfd
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    description:
>> +      Contain interrupt for the ST which is the IRQ line shared across all
>> +      system controller members.
> 
> I don't think there's really much point having a description when there
> is only one interrupt, but it cannot do any harm I suppose!

OK. Wanted to emphasize that it may be shared with other devices. I'll
remove it.

> 
> Other than the email address question,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks,
> Conor.
> 
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  watchdog:
>> +    $ref: ../watchdog/atmel,at91rm9200-wdt.yaml
>> +    description:
>> +      Child node describing watchdog.
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +  - clocks
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +    st: timer@fffffd00 {
>> +        compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
>> +        reg = <0xfffffd00 0x100>;
>> +        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> +        clocks = <&slow_xtal>;
>> +
>> +        watchdog {
>> +            compatible = "atmel,at91rm9200-wdt";
>> +        };
>> +    };
>> +
>> +...
>> -- 
>> 2.34.1
>>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 54d3f586403e..68c0eacb01ac 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -4,15 +4,6 @@  Chipid required properties:
 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
 - reg : Should contain registers location and length
 
-System Timer (ST) required properties:
-- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the ST which is the IRQ line
-  shared across all System Controller members.
-- clocks: phandle to input clock.
-Its subnodes can be:
-- watchdog: compatible should be "atmel,at91rm9200-wdt"
-
 RAMC SDRAM/DDR Controller required properties:
 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
 			"atmel,at91sam9260-sdramc",
diff --git a/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
new file mode 100644
index 000000000000..a75644e1a2fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/atmel,at91rm9200-st.yaml
@@ -0,0 +1,65 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/atmel,at91rm9200-st.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip AT91 System Timer (ST)
+
+maintainers:
+  - Nicolas Ferre <nicolas.ferre@microchip.com>
+  - Alexandre Belloni <alexandre.belloni@microchip.com>
+  - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+description:
+  Microchip AT91 system timer integrates a period interval timer, a watchdog
+  timer and a real-time timer.
+
+properties:
+  compatible:
+    items:
+      - const: atmel,at91rm9200-st
+      - const: syscon
+      - const: simple-mfd
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description:
+      Contain interrupt for the ST which is the IRQ line shared across all
+      system controller members.
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  watchdog:
+    $ref: ../watchdog/atmel,at91rm9200-wdt.yaml
+    description:
+      Child node describing watchdog.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    st: timer@fffffd00 {
+        compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
+        reg = <0xfffffd00 0x100>;
+        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&slow_xtal>;
+
+        watchdog {
+            compatible = "atmel,at91rm9200-wdt";
+        };
+    };
+
+...