diff mbox series

x86: Handle V8BF in expand_vec_perm_broadcast_1

Message ID DM4PR11MB5487442537677F3B911B02C8EC789@DM4PR11MB5487.namprd11.prod.outlook.com
State New, archived
Headers
Series x86: Handle V8BF in expand_vec_perm_broadcast_1 |

Commit Message

Li, Pan2 via Gcc-patches Aug. 31, 2022, 6:52 a.m. UTC 
  Hi,

Handle E_V8BFmode in expand_vec_perm_broadcast_1 and ix86_expand_vector_init_duplicate.
Ok for trunk?

gcc/ChangeLog:

	PR target/106742
	* config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
	Handle V8BF mode.
	(expand_vec_perm_broadcast_1): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr106742.c: New test.
---
 gcc/config/i386/i386-expand.cc           | 17 ++++++++++++-----
 gcc/testsuite/gcc.target/i386/pr106742.c | 10 ++++++++++
 2 files changed, 22 insertions(+), 5 deletions(-)  create mode 100644 gcc/testsuite/gcc.target/i386/pr106742.c

Comments

Hongtao Liu Aug. 31, 2022, 9:55 a.m. UTC | #1 
On Wed, Aug 31, 2022 at 2:52 PM Kong, Lingling via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>
> Handle E_V8BFmode in expand_vec_perm_broadcast_1 and ix86_expand_vector_init_duplicate.
> Ok for trunk?
>
> gcc/ChangeLog:
>
>         PR target/106742
>         * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
>         Handle V8BF mode.
>         (expand_vec_perm_broadcast_1): Ditto.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/i386/pr106742.c: New test.
> ---
>  gcc/config/i386/i386-expand.cc           | 17 ++++++++++++-----
>  gcc/testsuite/gcc.target/i386/pr106742.c | 10 ++++++++++
>  2 files changed, 22 insertions(+), 5 deletions(-)  create mode 100644 gcc/testsuite/gcc.target/i386/pr106742.c
>
> diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 4b216308a18..a08222fe1b6 100644
> --- a/gcc/config/i386/i386-expand.cc
> +++ b/gcc/config/i386/i386-expand.cc
> @@ -15030,11 +15030,15 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode,
>           dperm.op0 = dperm.op1 = gen_reg_rtx (mode);
>           dperm.one_operand_p = true;
>
> -         if (mode == V8HFmode)
> +         if (mode == V8HFmode || mode == V8BFmode)
>             {
> -             tmp1 = force_reg (HFmode, val);
> +             rtx (*gen_vec_set_0) (rtx, rtx, rtx) = NULL;
> +             tmp1 = mode == V8HFmode ? force_reg (HFmode, val)
> +                                     : force_reg (BFmode, val);
tmp1 = force_reg (GET_MODE_INNER (mode), val);
>               tmp2 = gen_reg_rtx (mode);
> -             emit_insn (gen_vec_setv8hf_0 (tmp2, CONST0_RTX (mode), tmp1));
> +             gen_vec_set_0 = mode == V8HFmode ? gen_vec_setv8hf_0
> +                                              : gen_vec_setv8bf_0;
add @ to vec_set<mode>_0 as (define_insn "@vec_set<mode>_0" and pass
mode to vec_set_0 as
emit_insn (gen_vec_set_0 (mode, tmp2, CONST0_RTX (mode), tmp1));
> +             emit_insn (gen_vec_set_0 (tmp2, CONST0_RTX (mode), tmp1));

>               tmp1 = gen_lowpart (mode, tmp2);
>             }
>           else
> @@ -21822,17 +21826,20 @@ expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d)
>        return true;
>
>      case E_V8HFmode:
> +    case E_V8BFmode:
>        /* This can be implemented via interleave and pshufd.  */
>        if (d->testing_p)
>         return true;
>
>        if (elt >= nelt2)
>         {
> -         gen = gen_vec_interleave_highv8hf;
> +         gen = vmode == V8HFmode ? gen_vec_interleave_highv8hf
> +                                 : gen_vec_interleave_highv8bf;
Similar, add @ to define_insn and pass gen_vec_interleave.
>           elt -= nelt2;
>         }
>        else
> -       gen = gen_vec_interleave_lowv8hf;
> +       gen = vmode == V8HFmode ? gen_vec_interleave_lowv8hf
> +                               : gen_vec_interleave_lowv8bf;
>        nelt2 /= 2;
>
>        dest = gen_reg_rtx (vmode);
> diff --git a/gcc/testsuite/gcc.target/i386/pr106742.c b/gcc/testsuite/gcc.target/i386/pr106742.c
> new file mode 100644
> index 00000000000..4a53cd49902
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr106742.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile } */
> +/* { dg-options " -msse2 -mno-avx2 -O1" } */
> +typedef __bf16 v8bf __attribute__ ((__vector_size__ (16)));
> +
> +v8bf
> +vec_init_dup_v8bf (__bf16 a1)
> +{
> +  return __extension__ (v8bf) { a1, a1, a1, a1, a1, a1, a1, a1 }; }
> +/* { dg-final { scan-assembler-times "punpcklwd" 1} } */
> --
> 2.18.2
>
Li, Pan2 via Gcc-patches Sept. 2, 2022, 8:08 a.m. UTC | #2 
Hi,

I fixed it in a new patch.  And added BF vector mode in SUBST_V and avx512fmaskhalfmode for @vec_interleave_high<mode><mask_name>.
Ok for trunk ?

> > Hi,
> >
> > Handle E_V8BFmode in expand_vec_perm_broadcast_1 and
> ix86_expand_vector_init_duplicate.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> >         PR target/106742
> >         * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
> >         Handle V8BF mode.
> >         (expand_vec_perm_broadcast_1): Ditto.
> >
> > gcc/testsuite/ChangeLog:
> >
> >         * gcc.target/i386/pr106742.c: New test.
> > ---
> >  gcc/config/i386/i386-expand.cc           | 17 ++++++++++++-----
> >  gcc/testsuite/gcc.target/i386/pr106742.c | 10 ++++++++++
> >  2 files changed, 22 insertions(+), 5 deletions(-)  create mode 100644
> > gcc/testsuite/gcc.target/i386/pr106742.c
> >
> > diff --git a/gcc/config/i386/i386-expand.cc
> > b/gcc/config/i386/i386-expand.cc index 4b216308a18..a08222fe1b6 100644
> > --- a/gcc/config/i386/i386-expand.cc
> > +++ b/gcc/config/i386/i386-expand.cc
> > @@ -15030,11 +15030,15 @@ ix86_expand_vector_init_duplicate (bool
> mmx_ok, machine_mode mode,
> >           dperm.op0 = dperm.op1 = gen_reg_rtx (mode);
> >           dperm.one_operand_p = true;
> >
> > -         if (mode == V8HFmode)
> > +         if (mode == V8HFmode || mode == V8BFmode)
> >             {
> > -             tmp1 = force_reg (HFmode, val);
> > +             rtx (*gen_vec_set_0) (rtx, rtx, rtx) = NULL;
> > +             tmp1 = mode == V8HFmode ? force_reg (HFmode, val)
> > +                                     : force_reg (BFmode, val);
> tmp1 = force_reg (GET_MODE_INNER (mode), val);
> >               tmp2 = gen_reg_rtx (mode);
> > -             emit_insn (gen_vec_setv8hf_0 (tmp2, CONST0_RTX (mode), tmp1));
> > +             gen_vec_set_0 = mode == V8HFmode ? gen_vec_setv8hf_0
> > +                                              : gen_vec_setv8bf_0;
> add @ to vec_set<mode>_0 as (define_insn "@vec_set<mode>_0" and pass
> mode to vec_set_0 as emit_insn (gen_vec_set_0 (mode, tmp2, CONST0_RTX
> (mode), tmp1));
> > +             emit_insn (gen_vec_set_0 (tmp2, CONST0_RTX (mode),
> > + tmp1));
> 
> >               tmp1 = gen_lowpart (mode, tmp2);
> >             }
> >           else
> > @@ -21822,17 +21826,20 @@ expand_vec_perm_broadcast_1 (struct
> expand_vec_perm_d *d)
> >        return true;
> >
> >      case E_V8HFmode:
> > +    case E_V8BFmode:
> >        /* This can be implemented via interleave and pshufd.  */
> >        if (d->testing_p)
> >         return true;
> >
> >        if (elt >= nelt2)
> >         {
> > -         gen = gen_vec_interleave_highv8hf;
> > +         gen = vmode == V8HFmode ? gen_vec_interleave_highv8hf
> > +                                 : gen_vec_interleave_highv8bf;
> Similar, add @ to define_insn and pass gen_vec_interleave.
> >           elt -= nelt2;
> >         }
> >        else
> > -       gen = gen_vec_interleave_lowv8hf;
> > +       gen = vmode == V8HFmode ? gen_vec_interleave_lowv8hf
> > +                               : gen_vec_interleave_lowv8bf;
> >        nelt2 /= 2;
> >
> >        dest = gen_reg_rtx (vmode);
> > diff --git a/gcc/testsuite/gcc.target/i386/pr106742.c
> > b/gcc/testsuite/gcc.target/i386/pr106742.c
> > new file mode 100644
> > index 00000000000..4a53cd49902
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr106742.c
> > @@ -0,0 +1,10 @@
> > +/* { dg-do compile } */
> > +/* { dg-options " -msse2 -mno-avx2 -O1" } */ typedef __bf16 v8bf
> > +__attribute__ ((__vector_size__ (16)));
> > +
> > +v8bf
> > +vec_init_dup_v8bf (__bf16 a1)
> > +{
> > +  return __extension__ (v8bf) { a1, a1, a1, a1, a1, a1, a1, a1 }; }
> > +/* { dg-final { scan-assembler-times "punpcklwd" 1} } */
> > --
> > 2.18.2
> >
> 
> 
> --
> BR,
> Hongtao
Hongtao Liu Sept. 5, 2022, 12:59 a.m. UTC | #3 
On Fri, Sep 2, 2022 at 4:08 PM Kong, Lingling <lingling.kong@intel.com> wrote:
>
> Hi,
>
> I fixed it in a new patch.  And added BF vector mode in SUBST_V and avx512fmaskhalfmode for @vec_interleave_high<mode><mask_name>.
> Ok for trunk ?
Ok.
>
> > > Hi,
> > >
> > > Handle E_V8BFmode in expand_vec_perm_broadcast_1 and
> > ix86_expand_vector_init_duplicate.
> > > Ok for trunk?
> > >
> > > gcc/ChangeLog:
> > >
> > >         PR target/106742
> > >         * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
> > >         Handle V8BF mode.
> > >         (expand_vec_perm_broadcast_1): Ditto.
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > >         * gcc.target/i386/pr106742.c: New test.
> > > ---
> > >  gcc/config/i386/i386-expand.cc           | 17 ++++++++++++-----
> > >  gcc/testsuite/gcc.target/i386/pr106742.c | 10 ++++++++++
> > >  2 files changed, 22 insertions(+), 5 deletions(-)  create mode 100644
> > > gcc/testsuite/gcc.target/i386/pr106742.c
> > >
> > > diff --git a/gcc/config/i386/i386-expand.cc
> > > b/gcc/config/i386/i386-expand.cc index 4b216308a18..a08222fe1b6 100644
> > > --- a/gcc/config/i386/i386-expand.cc
> > > +++ b/gcc/config/i386/i386-expand.cc
> > > @@ -15030,11 +15030,15 @@ ix86_expand_vector_init_duplicate (bool
> > mmx_ok, machine_mode mode,
> > >           dperm.op0 = dperm.op1 = gen_reg_rtx (mode);
> > >           dperm.one_operand_p = true;
> > >
> > > -         if (mode == V8HFmode)
> > > +         if (mode == V8HFmode || mode == V8BFmode)
> > >             {
> > > -             tmp1 = force_reg (HFmode, val);
> > > +             rtx (*gen_vec_set_0) (rtx, rtx, rtx) = NULL;
> > > +             tmp1 = mode == V8HFmode ? force_reg (HFmode, val)
> > > +                                     : force_reg (BFmode, val);
> > tmp1 = force_reg (GET_MODE_INNER (mode), val);
> > >               tmp2 = gen_reg_rtx (mode);
> > > -             emit_insn (gen_vec_setv8hf_0 (tmp2, CONST0_RTX (mode), tmp1));
> > > +             gen_vec_set_0 = mode == V8HFmode ? gen_vec_setv8hf_0
> > > +                                              : gen_vec_setv8bf_0;
> > add @ to vec_set<mode>_0 as (define_insn "@vec_set<mode>_0" and pass
> > mode to vec_set_0 as emit_insn (gen_vec_set_0 (mode, tmp2, CONST0_RTX
> > (mode), tmp1));
> > > +             emit_insn (gen_vec_set_0 (tmp2, CONST0_RTX (mode),
> > > + tmp1));
> >
> > >               tmp1 = gen_lowpart (mode, tmp2);
> > >             }
> > >           else
> > > @@ -21822,17 +21826,20 @@ expand_vec_perm_broadcast_1 (struct
> > expand_vec_perm_d *d)
> > >        return true;
> > >
> > >      case E_V8HFmode:
> > > +    case E_V8BFmode:
> > >        /* This can be implemented via interleave and pshufd.  */
> > >        if (d->testing_p)
> > >         return true;
> > >
> > >        if (elt >= nelt2)
> > >         {
> > > -         gen = gen_vec_interleave_highv8hf;
> > > +         gen = vmode == V8HFmode ? gen_vec_interleave_highv8hf
> > > +                                 : gen_vec_interleave_highv8bf;
> > Similar, add @ to define_insn and pass gen_vec_interleave.
> > >           elt -= nelt2;
> > >         }
> > >        else
> > > -       gen = gen_vec_interleave_lowv8hf;
> > > +       gen = vmode == V8HFmode ? gen_vec_interleave_lowv8hf
> > > +                               : gen_vec_interleave_lowv8bf;
> > >        nelt2 /= 2;
> > >
> > >        dest = gen_reg_rtx (vmode);
> > > diff --git a/gcc/testsuite/gcc.target/i386/pr106742.c
> > > b/gcc/testsuite/gcc.target/i386/pr106742.c
> > > new file mode 100644
> > > index 00000000000..4a53cd49902
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/i386/pr106742.c
> > > @@ -0,0 +1,10 @@
> > > +/* { dg-do compile } */
> > > +/* { dg-options " -msse2 -mno-avx2 -O1" } */ typedef __bf16 v8bf
> > > +__attribute__ ((__vector_size__ (16)));
> > > +
> > > +v8bf
> > > +vec_init_dup_v8bf (__bf16 a1)
> > > +{
> > > +  return __extension__ (v8bf) { a1, a1, a1, a1, a1, a1, a1, a1 }; }
> > > +/* { dg-final { scan-assembler-times "punpcklwd" 1} } */
> > > --
> > > 2.18.2
> > >
> >
> >
> > --
> > BR,
> > Hongtao
diff mbox series

Patch

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 4b216308a18..a08222fe1b6 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -15030,11 +15030,15 @@  ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode,
 	  dperm.op0 = dperm.op1 = gen_reg_rtx (mode);
 	  dperm.one_operand_p = true;
 
-	  if (mode == V8HFmode)
+	  if (mode == V8HFmode || mode == V8BFmode)
 	    {
-	      tmp1 = force_reg (HFmode, val);
+	      rtx (*gen_vec_set_0) (rtx, rtx, rtx) = NULL;
+	      tmp1 = mode == V8HFmode ? force_reg (HFmode, val)
+				      : force_reg (BFmode, val);
 	      tmp2 = gen_reg_rtx (mode);
-	      emit_insn (gen_vec_setv8hf_0 (tmp2, CONST0_RTX (mode), tmp1));
+	      gen_vec_set_0 = mode == V8HFmode ? gen_vec_setv8hf_0
+					       : gen_vec_setv8bf_0;
+	      emit_insn (gen_vec_set_0 (tmp2, CONST0_RTX (mode), tmp1));
 	      tmp1 = gen_lowpart (mode, tmp2);
 	    }
 	  else
@@ -21822,17 +21826,20 @@  expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d)
       return true;
 
     case E_V8HFmode:
+    case E_V8BFmode:
       /* This can be implemented via interleave and pshufd.  */
       if (d->testing_p)
 	return true;
 
       if (elt >= nelt2)
 	{
-	  gen = gen_vec_interleave_highv8hf;
+	  gen = vmode == V8HFmode ? gen_vec_interleave_highv8hf
+				  : gen_vec_interleave_highv8bf;
 	  elt -= nelt2;
 	}
       else
-	gen = gen_vec_interleave_lowv8hf;
+	gen = vmode == V8HFmode ? gen_vec_interleave_lowv8hf
+				: gen_vec_interleave_lowv8bf;
       nelt2 /= 2;
 
       dest = gen_reg_rtx (vmode);
diff --git a/gcc/testsuite/gcc.target/i386/pr106742.c b/gcc/testsuite/gcc.target/i386/pr106742.c
new file mode 100644
index 00000000000..4a53cd49902
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr106742.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options " -msse2 -mno-avx2 -O1" } */
+typedef __bf16 v8bf __attribute__ ((__vector_size__ (16)));
+
+v8bf
+vec_init_dup_v8bf (__bf16 a1)
+{
+  return __extension__ (v8bf) { a1, a1, a1, a1, a1, a1, a1, a1 }; }
+/* { dg-final { scan-assembler-times "punpcklwd" 1} } */
--
2.18.2