diff mbox series

[v2] drm/amd/display: enable more strict compile checks

Message ID 20230524191955.252212-1-hamza.mahfooz@amd.com
State New
Headers
Series [v2] drm/amd/display: enable more strict compile checks |

Commit Message

Hamza Mahfooz May 24, 2023, 7:19 p.m. UTC 
  Currently, there are quite a number of issues that are quite easy for
the CI to catch, that slip through the cracks. Among them, there are
unused variable and indentation issues. Also, we should consider all
warnings to be compile errors, since the community will eventually end
up complaining about them. So, enable -Werror, -Wunused and
-Wmisleading-indentation for all kernel builds.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Kenny Ho <kenny.ho@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
---
v2: fix grammatical error
---
 drivers/gpu/drm/amd/display/Makefile | 2 ++
 1 file changed, 2 insertions(+)

Comments

Felix Kuehling May 24, 2023, 7:45 p.m. UTC | #1 
Sure, I think we tried enabling warnings as errors before and had to 
revert it because of weird compiler quirks or the variety of compiler 
versions that need to be supported.

Alex, are you planning to upstream this, or is this only to enforce more 
internal discipline about not ignoring warnings?

Regards,
   Felix


On 2023-05-24 15:41, Russell, Kent wrote:
>
> [AMD Official Use Only - General]
>
>
> (Adding Felix in CC)
>
> I’m a fan of adding it to KFD as well. Felix, can you foresee any 
> issues here?
>
> Kent
>
> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of 
> *Ho, Kenny
> *Sent:* Wednesday, May 24, 2023 3:23 PM
> *To:* Alex Deucher <alexdeucher@gmail.com>; Mahfooz, Hamza 
> <Hamza.Mahfooz@amd.com>
> *Cc:* Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry 
> <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, 
> Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org; 
> dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Daniel 
> Vetter <daniel@ffwll.ch>; Deucher, Alexander 
> <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig, 
> Christian <Christian.Koenig@amd.com>
> *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile 
> checks
>
> [AMD Official Use Only - General]
>
> [AMD Official Use Only - General]
>
> (+ Felix)
>
> Should we do the same for other modules under amd (amdkfd)?  I was 
> going to enable full kernel werror in the kconfig used by my CI but 
> this is probably better.
>
> Kenny
>
> ------------------------------------------------------------------------
>
> *From:*Alex Deucher <alexdeucher@gmail.com>
> *Sent:* Wednesday, May 24, 2023 3:22 PM
> *To:* Mahfooz, Hamza <Hamza.Mahfooz@amd.com>
> *Cc:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; 
> Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>; 
> Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo 
> <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org 
> <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org 
> <dri-devel@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>; 
> Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie 
> <airlied@gmail.com>; Wentland, Harry <Harry.Wentland@amd.com>; Koenig, 
> Christian <Christian.Koenig@amd.com>
> *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile 
> checks
>
> On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com> 
> wrote:
> >
> > Currently, there are quite a number of issues that are quite easy for
> > the CI to catch, that slip through the cracks. Among them, there are
> > unused variable and indentation issues. Also, we should consider all
> > warnings to be compile errors, since the community will eventually end
> > up complaining about them. So, enable -Werror, -Wunused and
> > -Wmisleading-indentation for all kernel builds.
> >
> > Cc: Alex Deucher <alexander.deucher@amd.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Kenny Ho <kenny.ho@amd.com>
> > Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
> > ---
> > v2: fix grammatical error
> > ---
> >  drivers/gpu/drm/amd/display/Makefile | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/display/Makefile 
> b/drivers/gpu/drm/amd/display/Makefile
> > index 0d610cb376bb..3c44162ebe21 100644
> > --- a/drivers/gpu/drm/amd/display/Makefile
> > +++ b/drivers/gpu/drm/amd/display/Makefile
> > @@ -26,6 +26,8 @@
> >
> >  AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
> >
> > +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
> > +
>
> Care to enable this for the rest of amdgpu as well?  Or send out an
> additional patch to do that?  Either way:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> Alex
>
> >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
> >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
> >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
> > --
> > 2.40.1
> >
>
Alex Deucher May 24, 2023, 7:50 p.m. UTC | #2 
On Wed, May 24, 2023 at 3:46 PM Felix Kuehling <felix.kuehling@amd.com> wrote:
>
> Sure, I think we tried enabling warnings as errors before and had to
> revert it because of weird compiler quirks or the variety of compiler
> versions that need to be supported.
>
> Alex, are you planning to upstream this, or is this only to enforce more
> internal discipline about not ignoring warnings?

I'd like to upstream it.  Upstream already has CONFIG_WERROR as a
config option, but it's been problematic to enable in CI because of
various breakages outside of the driver and in different compilers.
That said, I don't know how much trouble enabling it will cause with
various compilers in the wild.

Alex

>
> Regards,
>    Felix
>
>
> On 2023-05-24 15:41, Russell, Kent wrote:
> >
> > [AMD Official Use Only - General]
> >
> >
> > (Adding Felix in CC)
> >
> > I’m a fan of adding it to KFD as well. Felix, can you foresee any
> > issues here?
> >
> > Kent
> >
> > *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of
> > *Ho, Kenny
> > *Sent:* Wednesday, May 24, 2023 3:23 PM
> > *To:* Alex Deucher <alexdeucher@gmail.com>; Mahfooz, Hamza
> > <Hamza.Mahfooz@amd.com>
> > *Cc:* Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry
> > <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira,
> > Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org;
> > dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Daniel
> > Vetter <daniel@ffwll.ch>; Deucher, Alexander
> > <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig,
> > Christian <Christian.Koenig@amd.com>
> > *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
> > checks
> >
> > [AMD Official Use Only - General]
> >
> > [AMD Official Use Only - General]
> >
> > (+ Felix)
> >
> > Should we do the same for other modules under amd (amdkfd)?  I was
> > going to enable full kernel werror in the kconfig used by my CI but
> > this is probably better.
> >
> > Kenny
> >
> > ------------------------------------------------------------------------
> >
> > *From:*Alex Deucher <alexdeucher@gmail.com>
> > *Sent:* Wednesday, May 24, 2023 3:22 PM
> > *To:* Mahfooz, Hamza <Hamza.Mahfooz@amd.com>
> > *Cc:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>;
> > Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>;
> > Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo
> > <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org
> > <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org
> > <dri-devel@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>;
> > Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie
> > <airlied@gmail.com>; Wentland, Harry <Harry.Wentland@amd.com>; Koenig,
> > Christian <Christian.Koenig@amd.com>
> > *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
> > checks
> >
> > On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com>
> > wrote:
> > >
> > > Currently, there are quite a number of issues that are quite easy for
> > > the CI to catch, that slip through the cracks. Among them, there are
> > > unused variable and indentation issues. Also, we should consider all
> > > warnings to be compile errors, since the community will eventually end
> > > up complaining about them. So, enable -Werror, -Wunused and
> > > -Wmisleading-indentation for all kernel builds.
> > >
> > > Cc: Alex Deucher <alexander.deucher@amd.com>
> > > Cc: Harry Wentland <harry.wentland@amd.com>
> > > Cc: Kenny Ho <kenny.ho@amd.com>
> > > Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
> > > ---
> > > v2: fix grammatical error
> > > ---
> > >  drivers/gpu/drm/amd/display/Makefile | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/amd/display/Makefile
> > b/drivers/gpu/drm/amd/display/Makefile
> > > index 0d610cb376bb..3c44162ebe21 100644
> > > --- a/drivers/gpu/drm/amd/display/Makefile
> > > +++ b/drivers/gpu/drm/amd/display/Makefile
> > > @@ -26,6 +26,8 @@
> > >
> > >  AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
> > >
> > > +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
> > > +
> >
> > Care to enable this for the rest of amdgpu as well?  Or send out an
> > additional patch to do that?  Either way:
> > Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> >
> > Alex
> >
> > >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
> > >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
> > >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
> > > --
> > > 2.40.1
> > >
> >
Harry Wentland May 24, 2023, 7:54 p.m. UTC | #3 
On 5/24/23 15:27, Hamza Mahfooz wrote:
> On 5/24/23 15:22, Alex Deucher wrote:
>> On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com> wrote:
>>>
>>> Currently, there are quite a number of issues that are quite easy for
>>> the CI to catch, that slip through the cracks. Among them, there are
>>> unused variable and indentation issues. Also, we should consider all
>>> warnings to be compile errors, since the community will eventually end
>>> up complaining about them. So, enable -Werror, -Wunused and
>>> -Wmisleading-indentation for all kernel builds.
>>>
>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>> Cc: Harry Wentland <harry.wentland@amd.com>
>>> Cc: Kenny Ho <kenny.ho@amd.com>
>>> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
>>> ---
>>> v2: fix grammatical error
>>> ---
>>>   drivers/gpu/drm/amd/display/Makefile | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/Makefile b/drivers/gpu/drm/amd/display/Makefile
>>> index 0d610cb376bb..3c44162ebe21 100644
>>> --- a/drivers/gpu/drm/amd/display/Makefile
>>> +++ b/drivers/gpu/drm/amd/display/Makefile
>>> @@ -26,6 +26,8 @@
>>>
>>>   AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
>>>
>>> +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
>>> +
>>
>> Care to enable this for the rest of amdgpu as well?  Or send out an
>> additional patch to do that?  Either way:
>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> 
> As far as I can tell, if `CONFIG_DRM_AMD_DC` is set it will run these
> checks on at least the base driver code.
> 

It's probable best to put that into amdgpu/Makefile in that case.

Harry

>>
>> Alex
>>
>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
>>> -- 
>>> 2.40.1
>>>
Ho, Kenny May 24, 2023, 7:56 p.m. UTC | #4 
[AMD Official Use Only - General]

I ran some experiment yesterday to turn on CONFIG_WERROR and here are some results (summary: gcc 12 seems ok but gcc 13 gives a lot more error, but not necessarily in our module.)

Build with gcc13 using Fedora 38:
http://zuul.linux.amd.com/t/osg/build/722ad77affed4f988d72051a84979e9f/log/job-output.txt#2924

Build with gcc12 using Fedora 37:
http://zuul.linux.amd.com/t/osg/build/9e90f08bbeb044a2997a41b6cdc13f29/log/job-output.txt#7534

Kenny

========================
From: Alex Deucher <alexdeucher@gmail.com>
Sent: Wednesday, May 24, 2023 3:50 PM
To: Kuehling, Felix <Felix.Kuehling@amd.com>
Cc: Russell, Kent <Kent.Russell@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>; Mahfooz, Hamza <Hamza.Mahfooz@amd.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org <dri-devel@lists.freedesktop.org>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>; Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig, Christian <Christian.Koenig@amd.com>
Subject: Re: [PATCH v2] drm/amd/display: enable more strict compile checks

On Wed, May 24, 2023 at 3:46 PM Felix Kuehling <felix.kuehling@amd.com> wrote:
>
> Sure, I think we tried enabling warnings as errors before and had to
> revert it because of weird compiler quirks or the variety of compiler
> versions that need to be supported.
>
> Alex, are you planning to upstream this, or is this only to enforce more
> internal discipline about not ignoring warnings?

I'd like to upstream it.  Upstream already has CONFIG_WERROR as a
config option, but it's been problematic to enable in CI because of
various breakages outside of the driver and in different compilers.
That said, I don't know how much trouble enabling it will cause with
various compilers in the wild.

Alex

>
> Regards,
>    Felix
>
>
> On 2023-05-24 15:41, Russell, Kent wrote:
> >
> > [AMD Official Use Only - General]
> >
> >
> > (Adding Felix in CC)
> >
> > I’m a fan of adding it to KFD as well. Felix, can you foresee any
> > issues here?
> >
> > Kent
> >
> > *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of
> > *Ho, Kenny
> > *Sent:* Wednesday, May 24, 2023 3:23 PM
> > *To:* Alex Deucher <alexdeucher@gmail.com>; Mahfooz, Hamza
> > <Hamza.Mahfooz@amd.com>
> > *Cc:* Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry
> > <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira,
> > Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org;
> > dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Daniel
> > Vetter <daniel@ffwll.ch>; Deucher, Alexander
> > <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig,
> > Christian <Christian.Koenig@amd.com>
> > *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
> > checks
> >
> > [AMD Official Use Only - General]
> >
> > [AMD Official Use Only - General]
> >
> > (+ Felix)
> >
> > Should we do the same for other modules under amd (amdkfd)?  I was
> > going to enable full kernel werror in the kconfig used by my CI but
> > this is probably better.
> >
> > Kenny
> >
> > ------------------------------------------------------------------------
> >
> > *From:*Alex Deucher <alexdeucher@gmail.com>
> > *Sent:* Wednesday, May 24, 2023 3:22 PM
> > *To:* Mahfooz, Hamza <Hamza.Mahfooz@amd.com>
> > *Cc:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>;
> > Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>;
> > Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo
> > <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org
> > <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org
> > <dri-devel@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>;
> > Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie
> > <airlied@gmail.com>; Wentland, Harry <Harry.Wentland@amd.com>; Koenig,
> > Christian <Christian.Koenig@amd.com>
> > *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
> > checks
> >
> > On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com>
> > wrote:
> > >
> > > Currently, there are quite a number of issues that are quite easy for
> > > the CI to catch, that slip through the cracks. Among them, there are
> > > unused variable and indentation issues. Also, we should consider all
> > > warnings to be compile errors, since the community will eventually end
> > > up complaining about them. So, enable -Werror, -Wunused and
> > > -Wmisleading-indentation for all kernel builds.
> > >
> > > Cc: Alex Deucher <alexander.deucher@amd.com>
> > > Cc: Harry Wentland <harry.wentland@amd.com>
> > > Cc: Kenny Ho <kenny.ho@amd.com>
> > > Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
> > > ---
> > > v2: fix grammatical error
> > > ---
> > >  drivers/gpu/drm/amd/display/Makefile | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/amd/display/Makefile
> > b/drivers/gpu/drm/amd/display/Makefile
> > > index 0d610cb376bb..3c44162ebe21 100644
> > > --- a/drivers/gpu/drm/amd/display/Makefile
> > > +++ b/drivers/gpu/drm/amd/display/Makefile
> > > @@ -26,6 +26,8 @@
> > >
> > >  AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
> > >
> > > +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
> > > +
> >
> > Care to enable this for the rest of amdgpu as well?  Or send out an
> > additional patch to do that?  Either way:
> > Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> >
> > Alex
> >
> > >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
> > >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
> > >  subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
> > > --
> > > 2.40.1
> > >
> >
Hamza Mahfooz May 24, 2023, 7:57 p.m. UTC | #5 
On 5/24/23 15:54, Harry Wentland wrote:
> 
> 
> On 5/24/23 15:27, Hamza Mahfooz wrote:
>> On 5/24/23 15:22, Alex Deucher wrote:
>>> On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com> wrote:
>>>>
>>>> Currently, there are quite a number of issues that are quite easy for
>>>> the CI to catch, that slip through the cracks. Among them, there are
>>>> unused variable and indentation issues. Also, we should consider all
>>>> warnings to be compile errors, since the community will eventually end
>>>> up complaining about them. So, enable -Werror, -Wunused and
>>>> -Wmisleading-indentation for all kernel builds.
>>>>
>>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>>> Cc: Harry Wentland <harry.wentland@amd.com>
>>>> Cc: Kenny Ho <kenny.ho@amd.com>
>>>> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
>>>> ---
>>>> v2: fix grammatical error
>>>> ---
>>>>    drivers/gpu/drm/amd/display/Makefile | 2 ++
>>>>    1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/display/Makefile b/drivers/gpu/drm/amd/display/Makefile
>>>> index 0d610cb376bb..3c44162ebe21 100644
>>>> --- a/drivers/gpu/drm/amd/display/Makefile
>>>> +++ b/drivers/gpu/drm/amd/display/Makefile
>>>> @@ -26,6 +26,8 @@
>>>>
>>>>    AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
>>>>
>>>> +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
>>>> +
>>>
>>> Care to enable this for the rest of amdgpu as well?  Or send out an
>>> additional patch to do that?  Either way:
>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>
>> As far as I can tell, if `CONFIG_DRM_AMD_DC` is set it will run these
>> checks on at least the base driver code.
>>
> 
> It's probable best to put that into amdgpu/Makefile in that case.

I tried the following, but it doesn't seem to work:

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile 
b/drivers/gpu/drm/amd/amdgpu/Makefile
index 74a9aa6fe18c..d97bde0796dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -39,6 +39,8 @@ ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
         -I$(FULL_AMD_DISPLAY_PATH)/amdgpu_dm \
         -I$(FULL_AMD_PATH)/amdkfd

+ccflags-y += -Werror -Wunused -Wmisleading-indentation
+
  amdgpu-y := amdgpu_drv.o

  # add KMS driver

> 
> Harry
> 
>>>
>>> Alex
>>>
>>>>    subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
>>>>    subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
>>>>    subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
>>>> -- 
>>>> 2.40.1
>>>>
>
Hamza Mahfooz May 24, 2023, 8:27 p.m. UTC | #6 
+ Kees

On 5/24/23 15:50, Alex Deucher wrote:
> On Wed, May 24, 2023 at 3:46 PM Felix Kuehling <felix.kuehling@amd.com> wrote:
>>
>> Sure, I think we tried enabling warnings as errors before and had to
>> revert it because of weird compiler quirks or the variety of compiler
>> versions that need to be supported.
>>
>> Alex, are you planning to upstream this, or is this only to enforce more
>> internal discipline about not ignoring warnings?
> 
> I'd like to upstream it.  Upstream already has CONFIG_WERROR as a
> config option, but it's been problematic to enable in CI because of
> various breakages outside of the driver and in different compilers.
> That said, I don't know how much trouble enabling it will cause with
> various compilers in the wild.
> 
> Alex
> 
>>
>> Regards,
>>     Felix
>>
>>
>> On 2023-05-24 15:41, Russell, Kent wrote:
>>>
>>> [AMD Official Use Only - General]
>>>
>>>
>>> (Adding Felix in CC)
>>>
>>> I’m a fan of adding it to KFD as well. Felix, can you foresee any
>>> issues here?
>>>
>>> Kent
>>>
>>> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of
>>> *Ho, Kenny
>>> *Sent:* Wednesday, May 24, 2023 3:23 PM
>>> *To:* Alex Deucher <alexdeucher@gmail.com>; Mahfooz, Hamza
>>> <Hamza.Mahfooz@amd.com>
>>> *Cc:* Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry
>>> <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira,
>>> Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org;
>>> dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Daniel
>>> Vetter <daniel@ffwll.ch>; Deucher, Alexander
>>> <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig,
>>> Christian <Christian.Koenig@amd.com>
>>> *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
>>> checks
>>>
>>> [AMD Official Use Only - General]
>>>
>>> [AMD Official Use Only - General]
>>>
>>> (+ Felix)
>>>
>>> Should we do the same for other modules under amd (amdkfd)?  I was
>>> going to enable full kernel werror in the kconfig used by my CI but
>>> this is probably better.
>>>
>>> Kenny
>>>
>>> ------------------------------------------------------------------------
>>>
>>> *From:*Alex Deucher <alexdeucher@gmail.com>
>>> *Sent:* Wednesday, May 24, 2023 3:22 PM
>>> *To:* Mahfooz, Hamza <Hamza.Mahfooz@amd.com>
>>> *Cc:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>;
>>> Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>;
>>> Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo
>>> <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org
>>> <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org
>>> <dri-devel@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>;
>>> Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie
>>> <airlied@gmail.com>; Wentland, Harry <Harry.Wentland@amd.com>; Koenig,
>>> Christian <Christian.Koenig@amd.com>
>>> *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
>>> checks
>>>
>>> On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com>
>>> wrote:
>>>>
>>>> Currently, there are quite a number of issues that are quite easy for
>>>> the CI to catch, that slip through the cracks. Among them, there are
>>>> unused variable and indentation issues. Also, we should consider all
>>>> warnings to be compile errors, since the community will eventually end
>>>> up complaining about them. So, enable -Werror, -Wunused and
>>>> -Wmisleading-indentation for all kernel builds.
>>>>
>>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>>> Cc: Harry Wentland <harry.wentland@amd.com>
>>>> Cc: Kenny Ho <kenny.ho@amd.com>
>>>> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
>>>> ---
>>>> v2: fix grammatical error
>>>> ---
>>>>   drivers/gpu/drm/amd/display/Makefile | 2 ++
>>>>   1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/display/Makefile
>>> b/drivers/gpu/drm/amd/display/Makefile
>>>> index 0d610cb376bb..3c44162ebe21 100644
>>>> --- a/drivers/gpu/drm/amd/display/Makefile
>>>> +++ b/drivers/gpu/drm/amd/display/Makefile
>>>> @@ -26,6 +26,8 @@
>>>>
>>>>   AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
>>>>
>>>> +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
>>>> +
>>>
>>> Care to enable this for the rest of amdgpu as well?  Or send out an
>>> additional patch to do that?  Either way:
>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>
>>> Alex
>>>
>>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
>>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
>>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
>>>> --
>>>> 2.40.1
>>>>
>>>
Jani Nikula May 25, 2023, 7:48 a.m. UTC | #7 
On Wed, 24 May 2023, Hamza Mahfooz <hamza.mahfooz@amd.com> wrote:
> + Kees
>
> On 5/24/23 15:50, Alex Deucher wrote:
>> On Wed, May 24, 2023 at 3:46 PM Felix Kuehling <felix.kuehling@amd.com> wrote:
>>>
>>> Sure, I think we tried enabling warnings as errors before and had to
>>> revert it because of weird compiler quirks or the variety of compiler
>>> versions that need to be supported.
>>>
>>> Alex, are you planning to upstream this, or is this only to enforce more
>>> internal discipline about not ignoring warnings?
>> 
>> I'd like to upstream it.  Upstream already has CONFIG_WERROR as a
>> config option, but it's been problematic to enable in CI because of
>> various breakages outside of the driver and in different compilers.
>> That said, I don't know how much trouble enabling it will cause with
>> various compilers in the wild.

FWIW, I think it's a bit scary to enable -Werror unconditionally. You'll
then need to take into account *all* compilers the kernel build
supports. I'd hate to fail the build for someone trying out a new
compiler that has some new warnings.

In i915, we've added our own kconfig for this that we tell our
developers to use and have enabled in our CI. It also depends on
!COMPILE_TEST to not get enabled by allmodconfig/allyesconfig configs.
The Makefile then has:

subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror

On a somewhat related side note, it would be great to be able to enable
the equivalent of W=1 on a subdir level. Now we need to add basically
the same stuff one by one. Cc: Masahiro.

BR,
Jani.


>> 
>> Alex
>> 
>>>
>>> Regards,
>>>     Felix
>>>
>>>
>>> On 2023-05-24 15:41, Russell, Kent wrote:
>>>>
>>>> [AMD Official Use Only - General]
>>>>
>>>>
>>>> (Adding Felix in CC)
>>>>
>>>> I’m a fan of adding it to KFD as well. Felix, can you foresee any
>>>> issues here?
>>>>
>>>> Kent
>>>>
>>>> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of
>>>> *Ho, Kenny
>>>> *Sent:* Wednesday, May 24, 2023 3:23 PM
>>>> *To:* Alex Deucher <alexdeucher@gmail.com>; Mahfooz, Hamza
>>>> <Hamza.Mahfooz@amd.com>
>>>> *Cc:* Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry
>>>> <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira,
>>>> Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org;
>>>> dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Daniel
>>>> Vetter <daniel@ffwll.ch>; Deucher, Alexander
>>>> <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig,
>>>> Christian <Christian.Koenig@amd.com>
>>>> *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
>>>> checks
>>>>
>>>> [AMD Official Use Only - General]
>>>>
>>>> [AMD Official Use Only - General]
>>>>
>>>> (+ Felix)
>>>>
>>>> Should we do the same for other modules under amd (amdkfd)?  I was
>>>> going to enable full kernel werror in the kconfig used by my CI but
>>>> this is probably better.
>>>>
>>>> Kenny
>>>>
>>>> ------------------------------------------------------------------------
>>>>
>>>> *From:*Alex Deucher <alexdeucher@gmail.com>
>>>> *Sent:* Wednesday, May 24, 2023 3:22 PM
>>>> *To:* Mahfooz, Hamza <Hamza.Mahfooz@amd.com>
>>>> *Cc:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>;
>>>> Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>;
>>>> Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo
>>>> <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org
>>>> <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org
>>>> <dri-devel@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>;
>>>> Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie
>>>> <airlied@gmail.com>; Wentland, Harry <Harry.Wentland@amd.com>; Koenig,
>>>> Christian <Christian.Koenig@amd.com>
>>>> *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
>>>> checks
>>>>
>>>> On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com>
>>>> wrote:
>>>>>
>>>>> Currently, there are quite a number of issues that are quite easy for
>>>>> the CI to catch, that slip through the cracks. Among them, there are
>>>>> unused variable and indentation issues. Also, we should consider all
>>>>> warnings to be compile errors, since the community will eventually end
>>>>> up complaining about them. So, enable -Werror, -Wunused and
>>>>> -Wmisleading-indentation for all kernel builds.
>>>>>
>>>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>>>> Cc: Harry Wentland <harry.wentland@amd.com>
>>>>> Cc: Kenny Ho <kenny.ho@amd.com>
>>>>> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
>>>>> ---
>>>>> v2: fix grammatical error
>>>>> ---
>>>>>   drivers/gpu/drm/amd/display/Makefile | 2 ++
>>>>>   1 file changed, 2 insertions(+)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/amd/display/Makefile
>>>> b/drivers/gpu/drm/amd/display/Makefile
>>>>> index 0d610cb376bb..3c44162ebe21 100644
>>>>> --- a/drivers/gpu/drm/amd/display/Makefile
>>>>> +++ b/drivers/gpu/drm/amd/display/Makefile
>>>>> @@ -26,6 +26,8 @@
>>>>>
>>>>>   AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
>>>>>
>>>>> +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
>>>>> +
>>>>
>>>> Care to enable this for the rest of amdgpu as well?  Or send out an
>>>> additional patch to do that?  Either way:
>>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>>
>>>> Alex
>>>>
>>>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
>>>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
>>>>>   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
>>>>> --
>>>>> 2.40.1
>>>>>
>>>>
Christoph Hellwig May 25, 2023, 9:43 a.m. UTC | #8 
> +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation

We have a config option for -Werror.  Blindly adding this will create
problems with too new (or sometimes too old, or just too weird)
compilers all the time.  Don't do this.
Kees Cook May 25, 2023, 3:37 p.m. UTC | #9 
Hi!

On Wed, May 24, 2023 at 04:27:31PM -0400, Hamza Mahfooz wrote:
> + Kees
> 
> On 5/24/23 15:50, Alex Deucher wrote:
> > On Wed, May 24, 2023 at 3:46 PM Felix Kuehling <felix.kuehling@amd.com> wrote:
> > > 
> > > Sure, I think we tried enabling warnings as errors before and had to
> > > revert it because of weird compiler quirks or the variety of compiler
> > > versions that need to be supported.
> > > 
> > > Alex, are you planning to upstream this, or is this only to enforce more
> > > internal discipline about not ignoring warnings?
> > 
> > I'd like to upstream it.  Upstream already has CONFIG_WERROR as a
> > config option, but it's been problematic to enable in CI because of
> > various breakages outside of the driver and in different compilers.
> > That said, I don't know how much trouble enabling it will cause with
> > various compilers in the wild.

-Wmisleading-indentation is already part of -Wall, so this is globally
enabled already.

-Wunused is enabled under W=1, and it's pretty noisy still. If you can
get builds clean in drm, that'll be a good step towards getting it
enabled globally. (A middle ground with less to clean up might be
-Wunused-but-set-variable)

I agree about -Werror: just stick with CONFIG_WERROR instead.

-Kees

> > 
> > Alex
> > 
> > > 
> > > Regards,
> > >     Felix
> > > 
> > > 
> > > On 2023-05-24 15:41, Russell, Kent wrote:
> > > > 
> > > > [AMD Official Use Only - General]
> > > > 
> > > > 
> > > > (Adding Felix in CC)
> > > > 
> > > > I’m a fan of adding it to KFD as well. Felix, can you foresee any
> > > > issues here?
> > > > 
> > > > Kent
> > > > 
> > > > *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of
> > > > *Ho, Kenny
> > > > *Sent:* Wednesday, May 24, 2023 3:23 PM
> > > > *To:* Alex Deucher <alexdeucher@gmail.com>; Mahfooz, Hamza
> > > > <Hamza.Mahfooz@amd.com>
> > > > *Cc:* Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry
> > > > <Harry.Wentland@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira,
> > > > Rodrigo <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org;
> > > > dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Daniel
> > > > Vetter <daniel@ffwll.ch>; Deucher, Alexander
> > > > <Alexander.Deucher@amd.com>; David Airlie <airlied@gmail.com>; Koenig,
> > > > Christian <Christian.Koenig@amd.com>
> > > > *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
> > > > checks
> > > > 
> > > > [AMD Official Use Only - General]
> > > > 
> > > > [AMD Official Use Only - General]
> > > > 
> > > > (+ Felix)
> > > > 
> > > > Should we do the same for other modules under amd (amdkfd)?  I was
> > > > going to enable full kernel werror in the kconfig used by my CI but
> > > > this is probably better.
> > > > 
> > > > Kenny
> > > > 
> > > > ------------------------------------------------------------------------
> > > > 
> > > > *From:*Alex Deucher <alexdeucher@gmail.com>
> > > > *Sent:* Wednesday, May 24, 2023 3:22 PM
> > > > *To:* Mahfooz, Hamza <Hamza.Mahfooz@amd.com>
> > > > *Cc:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>;
> > > > Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Ho, Kenny <Kenny.Ho@amd.com>;
> > > > Pan, Xinhui <Xinhui.Pan@amd.com>; Siqueira, Rodrigo
> > > > <Rodrigo.Siqueira@amd.com>; linux-kernel@vger.kernel.org
> > > > <linux-kernel@vger.kernel.org>; dri-devel@lists.freedesktop.org
> > > > <dri-devel@lists.freedesktop.org>; Daniel Vetter <daniel@ffwll.ch>;
> > > > Deucher, Alexander <Alexander.Deucher@amd.com>; David Airlie
> > > > <airlied@gmail.com>; Wentland, Harry <Harry.Wentland@amd.com>; Koenig,
> > > > Christian <Christian.Koenig@amd.com>
> > > > *Subject:* Re: [PATCH v2] drm/amd/display: enable more strict compile
> > > > checks
> > > > 
> > > > On Wed, May 24, 2023 at 3:20 PM Hamza Mahfooz <hamza.mahfooz@amd.com>
> > > > wrote:
> > > > > 
> > > > > Currently, there are quite a number of issues that are quite easy for
> > > > > the CI to catch, that slip through the cracks. Among them, there are
> > > > > unused variable and indentation issues. Also, we should consider all
> > > > > warnings to be compile errors, since the community will eventually end
> > > > > up complaining about them. So, enable -Werror, -Wunused and
> > > > > -Wmisleading-indentation for all kernel builds.
> > > > > 
> > > > > Cc: Alex Deucher <alexander.deucher@amd.com>
> > > > > Cc: Harry Wentland <harry.wentland@amd.com>
> > > > > Cc: Kenny Ho <kenny.ho@amd.com>
> > > > > Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
> > > > > ---
> > > > > v2: fix grammatical error
> > > > > ---
> > > > >   drivers/gpu/drm/amd/display/Makefile | 2 ++
> > > > >   1 file changed, 2 insertions(+)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/amd/display/Makefile
> > > > b/drivers/gpu/drm/amd/display/Makefile
> > > > > index 0d610cb376bb..3c44162ebe21 100644
> > > > > --- a/drivers/gpu/drm/amd/display/Makefile
> > > > > +++ b/drivers/gpu/drm/amd/display/Makefile
> > > > > @@ -26,6 +26,8 @@
> > > > > 
> > > > >   AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
> > > > > 
> > > > > +subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
> > > > > +
> > > > 
> > > > Care to enable this for the rest of amdgpu as well?  Or send out an
> > > > additional patch to do that?  Either way:
> > > > Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> > > > 
> > > > Alex
> > > > 
> > > > >   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
> > > > >   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
> > > > >   subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr
> > > > > --
> > > > > 2.40.1
> > > > > 
> > > > 
> -- 
> Hamza
>
Nathan Chancellor May 25, 2023, 4:26 p.m. UTC | #10 
On Thu, May 25, 2023 at 08:37:07AM -0700, Kees Cook wrote:
> Hi!
> 
> On Wed, May 24, 2023 at 04:27:31PM -0400, Hamza Mahfooz wrote:
> > + Kees
> > 
> > On 5/24/23 15:50, Alex Deucher wrote:
> > > On Wed, May 24, 2023 at 3:46 PM Felix Kuehling <felix.kuehling@amd.com> wrote:
> > > > 
> > > > Sure, I think we tried enabling warnings as errors before and had to
> > > > revert it because of weird compiler quirks or the variety of compiler
> > > > versions that need to be supported.
> > > > 
> > > > Alex, are you planning to upstream this, or is this only to enforce more
> > > > internal discipline about not ignoring warnings?
> > > 
> > > I'd like to upstream it.  Upstream already has CONFIG_WERROR as a
> > > config option, but it's been problematic to enable in CI because of
> > > various breakages outside of the driver and in different compilers.
> > > That said, I don't know how much trouble enabling it will cause with
> > > various compilers in the wild.
> 
> -Wmisleading-indentation is already part of -Wall, so this is globally
> enabled already.
> 
> -Wunused is enabled under W=1, and it's pretty noisy still. If you can
> get builds clean in drm, that'll be a good step towards getting it
> enabled globally. (A middle ground with less to clean up might be
> -Wunused-but-set-variable)
> 
> I agree about -Werror: just stick with CONFIG_WERROR instead.

There is also W=e, added by commit c77d06e70d59 ("kbuild: support W=e
to make build abort in case of warning") in 5.19, which works well for
building with configurations that do not have CONFIG_WERROR enabled and
avoiding dipping into menuconfig.

Unconditionally enabling -Werror with no way to turn it off is just
asking for problems over time with new compiler versions, either due to
new warnings in -Wall or warnings that have been improved or changed.
Should that still be desired, consider doing what i915 and PowerPC have
done and add a Kconfig option that can be disabled.

Cheers,
Nathan
kernel test robot May 26, 2023, 5 a.m. UTC | #11 
Hi Hamza,

kernel test robot noticed the following build errors:

[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on linus/master v6.4-rc3 next-20230525]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Hamza-Mahfooz/drm-amd-display-enable-more-strict-compile-checks/20230525-034537
base:   git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:    https://lore.kernel.org/r/20230524191955.252212-1-hamza.mahfooz%40amd.com
patch subject: [PATCH v2] drm/amd/display: enable more strict compile checks
config: x86_64-allyesconfig
compiler: gcc-11 (Debian 11.3.0-12) 11.3.0
reproduce (this is a W=1 build):
        # https://github.com/intel-lab-lkp/linux/commit/19bf85960032f3841215917e04659a6cc259dbcc
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Hamza-Mahfooz/drm-amd-display-enable-more-strict-compile-checks/20230525-034537
        git checkout 19bf85960032f3841215917e04659a6cc259dbcc
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        make W=1 O=build_dir ARCH=x86_64 olddefconfig
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202305261236.NDPNwMNA-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
     325 |         link_regs(0, A),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[0].TMDS_CTL_BITS')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
     325 |         link_regs(0, A),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
     325 |         link_regs(0, A),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[0].DP_DPHY_INTERNAL_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:325:9: note: in expansion of macro 'link_regs'
     325 |         link_regs(0, A),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
     326 |         link_regs(1, B),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[1].TMDS_CTL_BITS')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
     326 |         link_regs(1, B),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
     326 |         link_regs(1, B),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[1].DP_DPHY_INTERNAL_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:326:9: note: in expansion of macro 'link_regs'
     326 |         link_regs(1, B),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
     327 |         link_regs(2, C),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[2].TMDS_CTL_BITS')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
     327 |         link_regs(2, C),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
     327 |         link_regs(2, C),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[2].DP_DPHY_INTERNAL_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:327:9: note: in expansion of macro 'link_regs'
     327 |         link_regs(2, C),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
     328 |         link_regs(3, D),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[3].TMDS_CTL_BITS')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
     328 |         link_regs(3, D),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
     328 |         link_regs(3, D),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[3].DP_DPHY_INTERNAL_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:328:9: note: in expansion of macro 'link_regs'
     328 |         link_regs(3, D),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
     329 |         link_regs(4, E),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[4].TMDS_CTL_BITS')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
     329 |         link_regs(4, E),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
     329 |         link_regs(4, E),
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[4].DP_DPHY_INTERNAL_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:329:9: note: in expansion of macro 'link_regs'
     329 |         link_regs(4, E),
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
     330 |         link_regs(5, F)
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[5].TMDS_CTL_BITS')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:207:9: note: in expansion of macro 'SRI'
     207 |         SRI(TMDS_CTL_BITS, DIG, id), \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:238:9: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
     238 |         DPCS_DCN2_CMN_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:320:9: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
     320 |         DPCS_DCN2_REG_LIST(id), \
         |         ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
     330 |         link_regs(5, F)
         |         ^~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
     330 |         link_regs(5, F)
         |         ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[5].DP_DPHY_INTERNAL_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:321:9: note: in expansion of macro 'SRI'
     321 |         SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:330:9: note: in expansion of macro 'link_regs'
     330 |         link_regs(5, F)
         |         ^~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:70:
>> drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: error: initialized field overwritten [-Werror=override-init]
   39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
   39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
     184 |         LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |         ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:334:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
     334 |         LINK_ENCODER_MASK_SH_LIST_DCN20(__SHIFT),\
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: note: (near initialization for 'le_shift.TMDS_CTL0')
   39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39978:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
   39978 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
     184 |         LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |         ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:334:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
     334 |         LINK_ENCODER_MASK_SH_LIST_DCN20(__SHIFT),\
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: error: initialized field overwritten [-Werror=override-init]
   39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
   39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
     184 |         LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |         ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:339:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
     339 |         LINK_ENCODER_MASK_SH_LIST_DCN20(_MASK),\
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: note: (near initialization for 'le_mask.TMDS_CTL0')
   39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39982:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
   39982 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:9: note: in expansion of macro 'LE_SF'
     184 |         LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |         ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:339:9: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
     339 |         LINK_ENCODER_MASK_SH_LIST_DCN20(_MASK),\
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
     423 |         tf_regs(0),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[0].CURSOR_CONTROL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
     423 |         tf_regs(0),
         |         ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
     423 |         tf_regs(0),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[0].DSCL_MEM_PWR_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:423:9: note: in expansion of macro 'tf_regs'
     423 |         tf_regs(0),
         |         ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
     424 |         tf_regs(1),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[1].CURSOR_CONTROL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
     424 |         tf_regs(1),
         |         ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
     424 |         tf_regs(1),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[1].DSCL_MEM_PWR_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:424:9: note: in expansion of macro 'tf_regs'
     424 |         tf_regs(1),
         |         ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
     425 |         tf_regs(2),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[2].CURSOR_CONTROL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
     425 |         tf_regs(2),
         |         ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
     425 |         tf_regs(2),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[2].DSCL_MEM_PWR_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:425:9: note: in expansion of macro 'tf_regs'
     425 |         tf_regs(2),
         |         ^~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
     426 |         tf_regs(3),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[3].CURSOR_CONTROL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
     426 |         tf_regs(3),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
     426 |         tf_regs(3),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[3].DSCL_MEM_PWR_CTRL')
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:183:9: note: in expansion of macro 'SRI'
     183 |         SRI(DSCL_MEM_PWR_CTRL, DSCL, id)
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
         |         ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:426:9: note: in expansion of macro 'tf_regs'
     426 |         tf_regs(3),
         |         ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: error: initialized field overwritten [-Werror=override-init]
     269 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:127:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     127 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:129:19: note: in expansion of macro 'BASE_INNER'
     129 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:136:21: note: in expansion of macro 'BASE'
     136 |         .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                     ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:9: note: in expansion of macro 'SRI'
     181 |         SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |         ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:418:9: note: in expansion of macro 'TF_REG_LIST_DCN20'
     418 |         TF_REG_LIST_DCN20(id),\
..


vim +269 drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h

33934b3576b0ef Hawking Zhang 2019-03-04  266  
33934b3576b0ef Hawking Zhang 2019-03-04  267  #define DCN_BASE__INST0_SEG0                       0x00000012
33934b3576b0ef Hawking Zhang 2019-03-04  268  #define DCN_BASE__INST0_SEG1                       0x000000C0
33934b3576b0ef Hawking Zhang 2019-03-04 @269  #define DCN_BASE__INST0_SEG2                       0x000034C0
33934b3576b0ef Hawking Zhang 2019-03-04  270  #define DCN_BASE__INST0_SEG3                       0x00009000
33934b3576b0ef Hawking Zhang 2019-03-04  271  #define DCN_BASE__INST0_SEG4                       0
33934b3576b0ef Hawking Zhang 2019-03-04  272  #define DCN_BASE__INST0_SEG5                       0
33934b3576b0ef Hawking Zhang 2019-03-04  273
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/Makefile b/drivers/gpu/drm/amd/display/Makefile
index 0d610cb376bb..3c44162ebe21 100644
--- a/drivers/gpu/drm/amd/display/Makefile
+++ b/drivers/gpu/drm/amd/display/Makefile
@@ -26,6 +26,8 @@ 
 
 AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH)
 
+subdir-ccflags-y += -Werror -Wunused -Wmisleading-indentation
+
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw
 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr