[3/5] clk: qcom: Add lpass clock controller driver for SC8280XP
Commit Message
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the clocks and
bring the subsystems out of reset.
Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/Kconfig | 8 ++++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/lpasscc-sc8280xp.c | 71 +++++++++++++++++++++++++++++
3 files changed, 80 insertions(+)
create mode 100644 drivers/clk/qcom/lpasscc-sc8280xp.c
Comments
On Thu, May 18, 2023 at 12:37:58PM +0100, Srinivas Kandagatla wrote:
> Add support for the lpass clock controller found on SC8280XP based devices.
> This would allow lpass peripheral loader drivers to control the clocks and
> bring the subsystems out of reset.
>
> Currently this patch only supports resets as the Q6DSP is in control of
> LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
> channel.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> drivers/clk/qcom/Kconfig | 8 ++++
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/lpasscc-sc8280xp.c | 71 +++++++++++++++++++++++++++++
> 3 files changed, 80 insertions(+)
> create mode 100644 drivers/clk/qcom/lpasscc-sc8280xp.c
>
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 12be3e2371b3..8188f4dedf40 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -514,6 +514,14 @@ config SC_GPUCC_8280XP
> Say Y if you want to support graphics controller devices and
> functionality such as 3D graphics.
>
> +config SC_LPASSCC_8280XP
Should go after SC_LPASSCC_7280.
> + tristate "SC8280 Low Power Audio Subsystem (LPASS) Clock Controller"
> + select SC_GCC_8280XP
> + help
> + Support for the LPASS clock controller on SC8280XP devices.
> + Say Y if you want to use the LPASS branch clocks of the LPASS clock
> + controller to reset the LPASS subsystem.
> +
> config SC_LPASSCC_7280
> tristate "SC7280 Low Power Audio Subsystem (LPASS) Clock Controller"
> select SC_GCC_7280
> diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
> index 9ff4c373ad95..dce2dd639524 100644
> --- a/drivers/clk/qcom/Makefile
> +++ b/drivers/clk/qcom/Makefile
> @@ -71,6 +71,7 @@ obj-$(CONFIG_SC_CAMCC_7280) += camcc-sc7280.o
> obj-$(CONFIG_SC_DISPCC_7180) += dispcc-sc7180.o
> obj-$(CONFIG_SC_DISPCC_7280) += dispcc-sc7280.o
> obj-$(CONFIG_SC_DISPCC_8280XP) += dispcc-sc8280xp.o
> +obj-$(CONFIG_SC_LPASSCC_8280XP) += lpasscc-sc8280xp.o
This looks misplaced too.
> obj-$(CONFIG_SA_GCC_8775P) += gcc-sa8775p.o
> obj-$(CONFIG_SA_GPUCC_8775P) += gpucc-sa8775p.o
> obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o
> diff --git a/drivers/clk/qcom/lpasscc-sc8280xp.c b/drivers/clk/qcom/lpasscc-sc8280xp.c
> new file mode 100644
> index 000000000000..118320f8ee40
> --- /dev/null
> +++ b/drivers/clk/qcom/lpasscc-sc8280xp.c
> @@ -0,0 +1,71 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/err.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/regmap.h>
> +#include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h>
> +#include "common.h"
> +#include "reset.h"
Nit: add newline separators before dt-bindings and local includes,
respectively?
> +static int __init lpasscc_sc8280xp_init(void)
> +{
> + return platform_driver_register(&lpasscc_sc8280xp_driver);
> +}
> +subsys_initcall(lpasscc_sc8280xp_init);
Do you really need subsys init for this? I've been using this driver as
a module on the X13s and it seems to work fine.
> +static void __exit lpasscc_sc8280xp_exit(void)
> +{
> + platform_driver_unregister(&lpasscc_sc8280xp_driver);
> +}
> +module_exit(lpasscc_sc8280xp_exit);
> +
> +MODULE_DESCRIPTION("QTI LPASSCC SC8280XP Driver");
> +MODULE_LICENSE("GPL");
Johan
On Thu, May 18, 2023 at 12:37:58PM +0100, Srinivas Kandagatla wrote:
> +config SC_LPASSCC_8280XP
> + tristate "SC8280 Low Power Audio Subsystem (LPASS) Clock Controller"
> + select SC_GCC_8280XP
> + help
> + Support for the LPASS clock controller on SC8280XP devices.
> + Say Y if you want to use the LPASS branch clocks of the LPASS clock
> + controller to reset the LPASS subsystem.
And please include a defconfig update for this one as a separate patch
in the next revision as it is needed for audio on the X13s.
Johan
@@ -514,6 +514,14 @@ config SC_GPUCC_8280XP
Say Y if you want to support graphics controller devices and
functionality such as 3D graphics.
+config SC_LPASSCC_8280XP
+ tristate "SC8280 Low Power Audio Subsystem (LPASS) Clock Controller"
+ select SC_GCC_8280XP
+ help
+ Support for the LPASS clock controller on SC8280XP devices.
+ Say Y if you want to use the LPASS branch clocks of the LPASS clock
+ controller to reset the LPASS subsystem.
+
config SC_LPASSCC_7280
tristate "SC7280 Low Power Audio Subsystem (LPASS) Clock Controller"
select SC_GCC_7280
@@ -71,6 +71,7 @@ obj-$(CONFIG_SC_CAMCC_7280) += camcc-sc7280.o
obj-$(CONFIG_SC_DISPCC_7180) += dispcc-sc7180.o
obj-$(CONFIG_SC_DISPCC_7280) += dispcc-sc7280.o
obj-$(CONFIG_SC_DISPCC_8280XP) += dispcc-sc8280xp.o
+obj-$(CONFIG_SC_LPASSCC_8280XP) += lpasscc-sc8280xp.o
obj-$(CONFIG_SA_GCC_8775P) += gcc-sa8775p.o
obj-$(CONFIG_SA_GPUCC_8775P) += gpucc-sa8775p.o
obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o
new file mode 100644
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+#include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h>
+#include "common.h"
+#include "reset.h"
+
+static const struct qcom_reset_map lpass_tcsr_sc8280xp_resets[] = {
+ [LPASS_AUDIO_SWR_TX_CGCR] = { 0xc010, 1 },
+};
+
+static struct regmap_config lpass_tcsr_sc8280xp_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .name = "lpass-tcsr",
+ .max_register = 0x12000,
+};
+
+static const struct qcom_cc_desc lpass_tcsr_reset_sc8280xp_desc = {
+ .config = &lpass_tcsr_sc8280xp_regmap_config,
+ .resets = lpass_tcsr_sc8280xp_resets,
+ .num_resets = ARRAY_SIZE(lpass_tcsr_sc8280xp_resets),
+};
+
+static const struct of_device_id lpasscc_sc8280xp_match_table[] = {
+ {
+ .compatible = "qcom,sc8280xp-lpasscc",
+ .data = &lpass_tcsr_reset_sc8280xp_desc,
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, lpasscc_sc8280xp_match_table);
+
+static int lpasscc_sc8280xp_probe(struct platform_device *pdev)
+{
+ const struct qcom_cc_desc *desc = of_device_get_match_data(&pdev->dev);
+
+ return qcom_cc_probe_by_index(pdev, 0, desc);
+}
+
+static struct platform_driver lpasscc_sc8280xp_driver = {
+ .probe = lpasscc_sc8280xp_probe,
+ .driver = {
+ .name = "lpasscc-sc8280xp",
+ .of_match_table = lpasscc_sc8280xp_match_table,
+ },
+};
+
+static int __init lpasscc_sc8280xp_init(void)
+{
+ return platform_driver_register(&lpasscc_sc8280xp_driver);
+}
+subsys_initcall(lpasscc_sc8280xp_init);
+
+static void __exit lpasscc_sc8280xp_exit(void)
+{
+ platform_driver_unregister(&lpasscc_sc8280xp_driver);
+}
+module_exit(lpasscc_sc8280xp_exit);
+
+MODULE_DESCRIPTION("QTI LPASSCC SC8280XP Driver");
+MODULE_LICENSE("GPL");