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RISC-V: Fix the V calling convention

Message ID 20220901032746.22765-1-palmer@rivosinc.com
State New, archived
Headers
Series RISC-V: Fix the V calling convention |

Commit Message

Palmer Dabbelt Sept. 1, 2022, 3:27 a.m. UTC 
  The V registers are always clobbered on calls.

gcc/ChangeLog

	* config/riscv/riscv.cc (riscv_conditional_register_usage):
	Always mark the V registers as clobbered on calls.
---
 gcc/config/riscv/riscv.cc | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

Comments

Kito Cheng Sept. 2, 2022, 7:54 a.m. UTC | #1 
CALL_USED_REGISTERS already set those registers to 1, but I think it
is worth doing some clean up like this to prevent confusion.

On Thu, Sep 1, 2022 at 11:28 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> The V registers are always clobbered on calls.
>
> gcc/ChangeLog
>
>         * config/riscv/riscv.cc (riscv_conditional_register_usage):
>         Always mark the V registers as clobbered on calls.
> ---
>  gcc/config/riscv/riscv.cc | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 675d92c0961..c18e61f4a03 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -5442,11 +5442,18 @@ riscv_conditional_register_usage (void)
>    if (!TARGET_VECTOR)
>      {
>        for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++)
> -       fixed_regs[regno] = call_used_regs[regno] = 1;
> +       fixed_regs[regno] = 1;
>
> -      fixed_regs[VTYPE_REGNUM] = call_used_regs[VTYPE_REGNUM] = 1;
> -      fixed_regs[VL_REGNUM] = call_used_regs[VL_REGNUM] = 1;
> +      fixed_regs[VTYPE_REGNUM] = 1;
> +      fixed_regs[VL_REGNUM] = 1;
>      }

So we only need the above change I think.

> +
> +  /* The standard ABIs all clobber the entire vector state on calls.  */
> +  for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++)
> +    call_used_regs[regno] = 1;
> +
> +  call_used_regs[VTYPE_REGNUM] = 1;
> +  call_used_regs[VL_REGNUM] = 1;
>  }
>
>  /* Return a register priority for hard reg REGNO.  */
> --
> 2.34.1
>
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Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 675d92c0961..c18e61f4a03 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -5442,11 +5442,18 @@  riscv_conditional_register_usage (void)
   if (!TARGET_VECTOR)
     {
       for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++)
-	fixed_regs[regno] = call_used_regs[regno] = 1;
+	fixed_regs[regno] = 1;
 
-      fixed_regs[VTYPE_REGNUM] = call_used_regs[VTYPE_REGNUM] = 1;
-      fixed_regs[VL_REGNUM] = call_used_regs[VL_REGNUM] = 1;
+      fixed_regs[VTYPE_REGNUM] = 1;
+      fixed_regs[VL_REGNUM] = 1;
     }
+
+  /* The standard ABIs all clobber the entire vector state on calls.  */
+  for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++)
+    call_used_regs[regno] = 1;
+
+  call_used_regs[VTYPE_REGNUM] = 1;
+  call_used_regs[VL_REGNUM] = 1;
 }
 
 /* Return a register priority for hard reg REGNO.  */