[v2,3/3] arm64: dts: qcom: sm8550: Add missing RPMhPD OPP levels
Commit Message
We need more granularity for things like the GPU. Add the missing levels.
This unfortunately requires some re-indexing, resulting in an ugly diff.
Rename the nodes to prevent that in the future.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 40 +++++++++++++++++++++++++++---------
1 file changed, 30 insertions(+), 10 deletions(-)
Comments
On 17/05/2023 23:12, Konrad Dybcio wrote:
> We need more granularity for things like the GPU. Add the missing levels.
>
> This unfortunately requires some re-indexing, resulting in an ugly diff.
> Rename the nodes to prevent that in the future.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 40 +++++++++++++++++++++++++++---------
> 1 file changed, 30 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 6e9bad8f6f33..1c9460dc3d44 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -3608,43 +3608,63 @@ rpmhpd: power-controller {
> rpmhpd_opp_table: opp-table {
> compatible = "operating-points-v2";
>
> - rpmhpd_opp_ret: opp1 {
> + rpmhpd_opp_ret: opp-16 {
> opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
> };
>
> - rpmhpd_opp_min_svs: opp2 {
> + rpmhpd_opp_min_svs: opp-48 {
> opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
> };
It might have been better to split this into two patches (one to rename
existing opp, another one to add new opp nodes). Nevertheless:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
(if for some reason you send another revision splitting this patch, feel
free to keep the RB tag).
>
> - rpmhpd_opp_low_svs: opp3 {
> + rpmhpd_opp_lov_svs_d2: opp-52 {
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
> + };
> +
> + rpmhpd_opp_lov_svs_d1: opp-56 {
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
> + };
> +
> + rpmhpd_opp_lov_svs_d0: opp-60 {
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
> + };
> +
> + rpmhpd_opp_low_svs: opp-64 {
> opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> };
>
> - rpmhpd_opp_svs: opp4 {
> + rpmhpd_opp_low_svs_l1: opp-80 {
> + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
> + };
> +
> + rpmhpd_opp_svs: opp-128 {
> opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
> };
>
> - rpmhpd_opp_svs_l1: opp5 {
> + rpmhpd_opp_svs_l0: opp-144 {
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
> + };
> +
> + rpmhpd_opp_svs_l1: opp-192 {
> opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> };
>
> - rpmhpd_opp_nom: opp6 {
> + rpmhpd_opp_nom: opp-256 {
> opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
> };
>
> - rpmhpd_opp_nom_l1: opp7 {
> + rpmhpd_opp_nom_l1: opp-320 {
> opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
> };
>
> - rpmhpd_opp_nom_l2: opp8 {
> + rpmhpd_opp_nom_l2: opp-336 {
> opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
> };
>
> - rpmhpd_opp_turbo: opp9 {
> + rpmhpd_opp_turbo: opp-384 {
> opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
> };
>
> - rpmhpd_opp_turbo_l1: opp10 {
> + rpmhpd_opp_turbo_l1: opp-416 {
> opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
> };
> };
>
@@ -3608,43 +3608,63 @@ rpmhpd: power-controller {
rpmhpd_opp_table: opp-table {
compatible = "operating-points-v2";
- rpmhpd_opp_ret: opp1 {
+ rpmhpd_opp_ret: opp-16 {
opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
};
- rpmhpd_opp_min_svs: opp2 {
+ rpmhpd_opp_min_svs: opp-48 {
opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
};
- rpmhpd_opp_low_svs: opp3 {
+ rpmhpd_opp_lov_svs_d2: opp-52 {
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
+ };
+
+ rpmhpd_opp_lov_svs_d1: opp-56 {
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
+ };
+
+ rpmhpd_opp_lov_svs_d0: opp-60 {
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
+ };
+
+ rpmhpd_opp_low_svs: opp-64 {
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
};
- rpmhpd_opp_svs: opp4 {
+ rpmhpd_opp_low_svs_l1: opp-80 {
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
+ };
+
+ rpmhpd_opp_svs: opp-128 {
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
};
- rpmhpd_opp_svs_l1: opp5 {
+ rpmhpd_opp_svs_l0: opp-144 {
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
+ };
+
+ rpmhpd_opp_svs_l1: opp-192 {
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
};
- rpmhpd_opp_nom: opp6 {
+ rpmhpd_opp_nom: opp-256 {
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
};
- rpmhpd_opp_nom_l1: opp7 {
+ rpmhpd_opp_nom_l1: opp-320 {
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
};
- rpmhpd_opp_nom_l2: opp8 {
+ rpmhpd_opp_nom_l2: opp-336 {
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
};
- rpmhpd_opp_turbo: opp9 {
+ rpmhpd_opp_turbo: opp-384 {
opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
};
- rpmhpd_opp_turbo_l1: opp10 {
+ rpmhpd_opp_turbo_l1: opp-416 {
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
};
};