Message ID | 20230517-topic-a7xx_prep-v1-5-7a964f2e99c2@linaro.org |
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State | New |
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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g6-20020a2e9cc6000000b002af0e9abaf6sm159224ljj.131.2023.05.17.09.50.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 May 2023 09:50:21 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Wed, 17 May 2023 18:50:12 +0200 Subject: [PATCH 5/6] drm/msm/a6xx: Use GMU_ALWAYS_ON_COUNTER for GMU-equipped GPUs in timestamp MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230517-topic-a7xx_prep-v1-5-7a964f2e99c2@linaro.org> References: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> In-Reply-To: <20230517-topic-a7xx_prep-v1-0-7a964f2e99c2@linaro.org> To: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch> Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684342212; l=1052; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=yXq/EvspiDM4WLys1dNWbAg7dVVScVQhvkOnD1ANMBI=; b=r6jwsVtQ4nvBF0AJY4c2o98RWESzy2qTp1iwGXmihRYAaw/Lb3C3Gds/eT2qIOq5DsqpEtp6u 156ORD/lpIhDMiWaQkypMLl/VUZdMdWCtf9EjO5p0/D/H2C4QjxlzCj X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766160971081166749?= X-GMAIL-MSGID: =?utf-8?q?1766160971081166749?= |
Series |
Adreno QoL changes
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Commit Message
Konrad Dybcio
May 17, 2023, 4:50 p.m. UTC
Use the always-on counter provided by the GMU to skip having to
keep the GPU online.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
Comments
AFAIK GMU_ALWAYS_ON_COUNTER does not have the same value as CP_ALWAYS_ON_COUNTER (only the same frequency), so changing this would break userspace expecting to be able to compare the value returned by MSM_PARAM_TIMESTAMP with CP timestamp values. On 5/17/23 12:50 PM, Konrad Dybcio wrote: > Use the always-on counter provided by the GMU to skip having to > keep the GPU online. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------ > 1 file changed, 3 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index 8707e8b6ac7e..d2a999b90589 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) > > mutex_lock(&a6xx_gpu->gmu.lock); > > - /* Force the GPU power on so we can read this register */ > - a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); > - > - *value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); > - > - a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); > + *value = gmu_read64(&a6xx_gpu->gmu, > + REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, > + REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); > > mutex_unlock(&a6xx_gpu->gmu.lock); > >
On 17.05.2023 20:09, Jonathan Marek wrote: > AFAIK GMU_ALWAYS_ON_COUNTER does not have the same value as CP_ALWAYS_ON_COUNTER (only the same frequency), so changing this would break userspace expecting to be able to compare the value returned by MSM_PARAM_TIMESTAMP with CP timestamp values. FWIW A630 and A730 seem to work fine with this patch. Anything in particular I should look out for? Konrad > > On 5/17/23 12:50 PM, Konrad Dybcio wrote: >> Use the always-on counter provided by the GMU to skip having to >> keep the GPU online. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------ >> 1 file changed, 3 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> index 8707e8b6ac7e..d2a999b90589 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) >> mutex_lock(&a6xx_gpu->gmu.lock); >> - /* Force the GPU power on so we can read this register */ >> - a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); >> - >> - *value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); >> - >> - a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); >> + *value = gmu_read64(&a6xx_gpu->gmu, >> + REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, >> + REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); >> mutex_unlock(&a6xx_gpu->gmu.lock); >>
On 5/17/23 3:08 PM, Konrad Dybcio wrote: > > > On 17.05.2023 20:09, Jonathan Marek wrote: >> AFAIK GMU_ALWAYS_ON_COUNTER does not have the same value as CP_ALWAYS_ON_COUNTER (only the same frequency), so changing this would break userspace expecting to be able to compare the value returned by MSM_PARAM_TIMESTAMP with CP timestamp values. > FWIW A630 and A730 seem to work fine with this patch. Anything > in particular I should look out for? mesa uses it for perfetto tracing to synchronize the GPU/CPU timelines. > > Konrad >> >> On 5/17/23 12:50 PM, Konrad Dybcio wrote: >>> Use the always-on counter provided by the GMU to skip having to >>> keep the GPU online. >>> >>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >>> --- >>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------ >>> 1 file changed, 3 insertions(+), 6 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>> index 8707e8b6ac7e..d2a999b90589 100644 >>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>> @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) >>> mutex_lock(&a6xx_gpu->gmu.lock); >>> - /* Force the GPU power on so we can read this register */ >>> - a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); >>> - >>> - *value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); >>> - >>> - a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); >>> + *value = gmu_read64(&a6xx_gpu->gmu, >>> + REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, >>> + REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); >>> mutex_unlock(&a6xx_gpu->gmu.lock); >>>
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 8707e8b6ac7e..d2a999b90589 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) mutex_lock(&a6xx_gpu->gmu.lock); - /* Force the GPU power on so we can read this register */ - a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); - - *value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); - - a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); + *value = gmu_read64(&a6xx_gpu->gmu, + REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, + REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); mutex_unlock(&a6xx_gpu->gmu.lock);