Message ID | 20221031092125.533621-1-pierre.gondois@arm.com |
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State | New |
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Series |
Update cache properties for arm64 DTS
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Commit Message
Pierre Gondois
Oct. 31, 2022, 9:21 a.m. UTC
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The recently added init_of_cache_level() function checks
these properties. Add them if missing.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
arch/arm64/boot/dts/tesla/fsd.dtsi | 1 +
1 file changed, 1 insertion(+)
Comments
On Mon, 31 Oct 2022 10:21:19 +0100, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > > The recently added init_of_cache_level() function checks > these properties. Add them if missing. > > [...] Applied, thanks! [20/20] arm64: dts: Update cache properties for tesla https://git.kernel.org/krzk/linux/c/3f0d4a02c7490f1aa15764ed85dcf0881bf66b9e Best regards,
>-----Original Message----- >From: Pierre Gondois [mailto:pierre.gondois@arm.com] >Sent: Monday, October 31, 2022 2:51 PM >To: linux-kernel@vger.kernel.org >Cc: pierre.gondois@arm.com; Rob.Herring@arm.com; Rob Herring ><robh+dt@kernel.org>; Krzysztof Kozlowski ><krzysztof.kozlowski+dt@linaro.org>; Alim Akhtar ><alim.akhtar@samsung.com>; Aswani Reddy <aswani.reddy@samsung.com>; >Shashank Prashar <s.prashar@samsung.com>; Sriranjani P ><sriranjani.p@samsung.com>; devicetree@vger.kernel.org >Subject: [PATCH 20/20] arm64: dts: Update cache properties for tesla > >The DeviceTree Specification v0.3 specifies that the cache node 'compatible' >and 'cache-level' properties are 'required'. Cf. >s3.8 Multi-level and Shared Cache Nodes > >The recently added init_of_cache_level() function checks these properties. >Add them if missing. > >Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> >--- Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > arch/arm64/boot/dts/tesla/fsd.dtsi | 1 + > 1 file changed, 1 insertion(+) > >diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi >b/arch/arm64/boot/dts/tesla/fsd.dtsi >index f35bc5a288c2..bfab040fc1e4 100644 >--- a/arch/arm64/boot/dts/tesla/fsd.dtsi >+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi >@@ -284,6 +284,7 @@ cpucl_l2: l2-cache0 { > cache-size = <0x400000>; > cache-line-size = <64>; > cache-sets = <4096>; >+ cache-level = <2>; > }; > > idle-states { >-- >2.25.1
On 02/11/2022 21:21, Krzysztof Kozlowski wrote: > On Mon, 31 Oct 2022 10:21:19 +0100, Pierre Gondois wrote: >> The DeviceTree Specification v0.3 specifies that the cache node >> 'compatible' and 'cache-level' properties are 'required'. Cf. >> s3.8 Multi-level and Shared Cache Nodes >> >> The recently added init_of_cache_level() function checks >> these properties. Add them if missing. >> >> [...] > > Applied, thanks! > > [20/20] arm64: dts: Update cache properties for tesla > https://git.kernel.org/krzk/linux/c/3f0d4a02c7490f1aa15764ed85dcf0881bf66b9e Now dropped. I understand this is the intention/request of v2. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index f35bc5a288c2..bfab040fc1e4 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -284,6 +284,7 @@ cpucl_l2: l2-cache0 { cache-size = <0x400000>; cache-line-size = <64>; cache-sets = <4096>; + cache-level = <2>; }; idle-states {