[07/23] arm64: zynqmp: Add pmu interrupt-affinity

Message ID 4c6674bf7e048e7370248e50ed3d011d604d020e.1683034376.git.michal.simek@amd.com
State New
Headers
Series arm64: zynqmp: Misc zynqmp changes |

Commit Message

Michal Simek May 2, 2023, 1:35 p.m. UTC
  From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>

Explicitly specify interrupt affinity to avoid HW perfevents
need to guess. This avoids the following error upon linux boot:
armv8-pmu pmu: hw perfevents: no interrupt-affinity property,
guessing.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
  

Comments

Laurent Pinchart May 10, 2023, 7 a.m. UTC | #1
Hi Michal,

Thank you for the patch.

On Tue, May 02, 2023 at 03:35:35PM +0200, Michal Simek wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> 
> Explicitly specify interrupt affinity to avoid HW perfevents
> need to guess. This avoids the following error upon linux boot:
> armv8-pmu pmu: hw perfevents: no interrupt-affinity property,
> guessing.

As mentioned for some of the previous patches, the commit message should
explain why this change improves the DT system description. The fact
that it gets rid of a warning message may be mentioned, but it shouldn't
be the main focus.

> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 61c7045eb992..a117294dc890 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -161,6 +161,10 @@ pmu {
>  			     <0 144 4>,
>  			     <0 145 4>,
>  			     <0 146 4>;
> +		interrupt-affinity = <&cpu0>,
> +				     <&cpu1>,
> +				     <&cpu2>,
> +				     <&cpu3>;
>  	};
>  
>  	psci {
  
Michal Simek May 16, 2023, 11:05 a.m. UTC | #2
On 5/2/23 15:35, Michal Simek wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> 
> Explicitly specify interrupt affinity to avoid HW perfevents
> need to guess. This avoids the following error upon linux boot:
> armv8-pmu pmu: hw perfevents: no interrupt-affinity property,
> guessing.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 61c7045eb992..a117294dc890 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -161,6 +161,10 @@ pmu {
>   			     <0 144 4>,
>   			     <0 145 4>,
>   			     <0 146 4>;
> +		interrupt-affinity = <&cpu0>,
> +				     <&cpu1>,
> +				     <&cpu2>,
> +				     <&cpu3>;
>   	};
>   
>   	psci {

Applied.
M
  
Michal Simek May 16, 2023, 12:49 p.m. UTC | #3
On 5/16/23 13:05, Michal Simek wrote:
> 
> 
> On 5/2/23 15:35, Michal Simek wrote:
>> From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
>>
>> Explicitly specify interrupt affinity to avoid HW perfevents
>> need to guess. This avoids the following error upon linux boot:
>> armv8-pmu pmu: hw perfevents: no interrupt-affinity property,
>> guessing.
>>
>> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>> ---
>>
>>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
>> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> index 61c7045eb992..a117294dc890 100644
>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> @@ -161,6 +161,10 @@ pmu {
>>                    <0 144 4>,
>>                    <0 145 4>,
>>                    <0 146 4>;
>> +        interrupt-affinity = <&cpu0>,
>> +                     <&cpu1>,
>> +                     <&cpu2>,
>> +                     <&cpu3>;
>>       };
>>       psci {
> 
> Applied.
> M

Actually remove this one from my queue because there were comment from Laurent.

M
  

Patch

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 61c7045eb992..a117294dc890 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -161,6 +161,10 @@  pmu {
 			     <0 144 4>,
 			     <0 145 4>,
 			     <0 146 4>;
+		interrupt-affinity = <&cpu0>,
+				     <&cpu1>,
+				     <&cpu2>,
+				     <&cpu3>;
 	};
 
 	psci {