diff mbox series

[17/23] arm64: zynqmp: Switch to ethernet-phy-id in kv260

Message ID 4b139e942c2a808eecbb30226b6ea5303348390a.1683034376.git.michal.simek@amd.com
State New
Headers
Series arm64: zynqmp: Misc zynqmp changes |

Commit Message

Michal Simek May 2, 2023, 1:35 p.m. UTC 
  Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 6 ++++--
 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 6 ++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

Comments

Michal Simek May 16, 2023, 11:09 a.m. UTC | #1 
On 5/2/23 15:35, Michal Simek wrote:
> Use ethernet-phy-id compatible string to properly describe phy reset on
> kv260 boards. Previous description wasn't correct because reset was done
> for mdio bus to operate and it was in this case used for different purpose
> which was eth phy reset. With ethernet-phy-id phy reset happens only for
> the phy via phy framework.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>   arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 6 ++++--
>   arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 6 ++++--
>   2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
> index cb4a5126c4ec..817d756142ab 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
> @@ -146,16 +146,18 @@ &gem3 { /* required by spec */
>   	mdio: mdio {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
> -		reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
> -		reset-delay-us = <2>;
>   
>   		phy0: ethernet-phy@1 {
>   			#phy-cells = <1>;
>   			reg = <1>;
> +			compatible = "ethernet-phy-id2000.a231";
>   			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
>   			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
>   			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>   			ti,dp83867-rxctrl-strap-quirk;
> +			reset-assert-us = <100>;
> +			reset-deassert-us = <280>;
> +			reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
>   		};
>   	};
>   };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
> index 31bc120dee49..e07cec231ee0 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
> @@ -129,16 +129,18 @@ &gem3 { /* required by spec */
>   	mdio: mdio {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
> -		reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
> -		reset-delay-us = <2>;
>   
>   		phy0: ethernet-phy@1 {
>   			#phy-cells = <1>;
>   			reg = <1>;
> +			compatible = "ethernet-phy-id2000.a231";
>   			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
>   			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
>   			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>   			ti,dp83867-rxctrl-strap-quirk;
> +			reset-assert-us = <100>;
> +			reset-deassert-us = <280>;
> +			reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
>   		};
>   	};
>   };


Applied.
M
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index cb4a5126c4ec..817d756142ab 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
@@ -146,16 +146,18 @@  &gem3 { /* required by spec */
 	mdio: mdio {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
-		reset-delay-us = <2>;
 
 		phy0: ethernet-phy@1 {
 			#phy-cells = <1>;
 			reg = <1>;
+			compatible = "ethernet-phy-id2000.a231";
 			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
 			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
 			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-assert-us = <100>;
+			reset-deassert-us = <280>;
+			reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index 31bc120dee49..e07cec231ee0 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
@@ -129,16 +129,18 @@  &gem3 { /* required by spec */
 	mdio: mdio {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
-		reset-delay-us = <2>;
 
 		phy0: ethernet-phy@1 {
 			#phy-cells = <1>;
 			reg = <1>;
+			compatible = "ethernet-phy-id2000.a231";
 			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
 			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
 			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 			ti,dp83867-rxctrl-strap-quirk;
+			reset-assert-us = <100>;
+			reset-deassert-us = <280>;
+			reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 		};
 	};
 };