arm64: dts: qcom: sm8450: Add missing RPMhPD OPP levels

Message ID 20230516005306.952821-1-konrad.dybcio@linaro.org
State New
Headers
Series arm64: dts: qcom: sm8450: Add missing RPMhPD OPP levels |

Commit Message

Konrad Dybcio May 16, 2023, 12:53 a.m. UTC
  We need more granularity for things like the GPU. Add the missing levels.

This unfortunately requires some re-indexing, resulting in an ugly diff.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)
  

Comments

Neil Armstrong May 16, 2023, 7 a.m. UTC | #1
On 16/05/2023 02:53, Konrad Dybcio wrote:
> We need more granularity for things like the GPU. Add the missing levels.
> 
> This unfortunately requires some re-indexing, resulting in an ugly diff.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>   arch/arm64/boot/dts/qcom/sm8450.dtsi | 26 +++++++++++++++++++-------
>   1 file changed, 19 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index b4fc6abf8d8a..d3ac5644232b 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -4195,31 +4195,43 @@ rpmhpd_opp_low_svs: opp4 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
>   					};
>   
> -					rpmhpd_opp_svs: opp5 {
> +					rpmhpd_opp_low_svs_l1: opp5 {
> +						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
> +					};
> +
> +					rpmhpd_opp_svs: opp6 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
>   					};
>   
> -					rpmhpd_opp_svs_l1: opp6 {
> +					rpmhpd_opp_svs_l0: opp7 {
> +						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
> +					};
> +
> +					rpmhpd_opp_svs_l1: opp8 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
>   					};
>   
> -					rpmhpd_opp_nom: opp7 {
> +					rpmhpd_opp_svs_l2: opp9 {
> +						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
> +					};
> +
> +					rpmhpd_opp_nom: opp10 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
>   					};
>   
> -					rpmhpd_opp_nom_l1: opp8 {
> +					rpmhpd_opp_nom_l1: opp11 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
>   					};
>   
> -					rpmhpd_opp_nom_l2: opp9 {
> +					rpmhpd_opp_nom_l2: opp12 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
>   					};
>   
> -					rpmhpd_opp_turbo: opp10 {
> +					rpmhpd_opp_turbo: opp13 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
>   					};
>   
> -					rpmhpd_opp_turbo_l1: opp11 {
> +					rpmhpd_opp_turbo_l1: opp14 {
>   						opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
>   					};
>   				};

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
  
Bjorn Andersson May 25, 2023, 4:53 a.m. UTC | #2
On Tue, 16 May 2023 02:53:06 +0200, Konrad Dybcio wrote:
> We need more granularity for things like the GPU. Add the missing levels.
> 
> This unfortunately requires some re-indexing, resulting in an ugly diff.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm8450: Add missing RPMhPD OPP levels
      commit: ec8bb9c5b1c6963db3ed09e4a9148ae85804b962

Best regards,
  

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index b4fc6abf8d8a..d3ac5644232b 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4195,31 +4195,43 @@  rpmhpd_opp_low_svs: opp4 {
 						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 					};
 
-					rpmhpd_opp_svs: opp5 {
+					rpmhpd_opp_low_svs_l1: opp5 {
+						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
+					};
+
+					rpmhpd_opp_svs: opp6 {
 						opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
 					};
 
-					rpmhpd_opp_svs_l1: opp6 {
+					rpmhpd_opp_svs_l0: opp7 {
+						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
+					};
+
+					rpmhpd_opp_svs_l1: opp8 {
 						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
 					};
 
-					rpmhpd_opp_nom: opp7 {
+					rpmhpd_opp_svs_l2: opp9 {
+						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+					};
+
+					rpmhpd_opp_nom: opp10 {
 						opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
 					};
 
-					rpmhpd_opp_nom_l1: opp8 {
+					rpmhpd_opp_nom_l1: opp11 {
 						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
 					};
 
-					rpmhpd_opp_nom_l2: opp9 {
+					rpmhpd_opp_nom_l2: opp12 {
 						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
 					};
 
-					rpmhpd_opp_turbo: opp10 {
+					rpmhpd_opp_turbo: opp13 {
 						opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
 					};
 
-					rpmhpd_opp_turbo_l1: opp11 {
+					rpmhpd_opp_turbo_l1: opp14 {
 						opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
 					};
 				};