diff mbox series

[02/20] arm64: dts: Update cache properties for amlogic

Message ID	20221031091918.531607-1-pierre.gondois@arm.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Pierre Gondois <pierre.gondois@arm.com> To: linux-kernel@vger.kernel.org Cc: pierre.gondois@arm.com, Rob.Herring@arm.com, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Neil Armstrong <neil.armstrong@linaro.org>, Kevin Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, Martin Blumenstingl <martin.blumenstingl@googlemail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org Subject: [PATCH 02/20] arm64: dts: Update cache properties for amlogic Date: Mon, 31 Oct 2022 10:19:18 +0100 Message-Id: <20221031091918.531607-1-pierre.gondois@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Update cache properties for arm64 DTS \| [00/20] Update cache properties for arm64 DTS [01/20] arm64: dts: Update cache properties for amd [02/20] arm64: dts: Update cache properties for amlogic [03/20] arm64: dts: Update cache properties for apm [04/20] arm64: dts: Update cache properties for arm [05/20] arm64: dts: Update cache properties for broadcom [06/20] arm64: dts: Update cache properties for exynos [07/20] arm64: dts: Update cache properties for freescale [08/20] arm64: dts: Update cache properties for hisilicon [09/20] arm64: dts: Update cache properties for lg [10/20] arm64: dts: Update cache properties for marvell [11/20] arm64: dts: Update cache properties for mediatek [12/20] arm64: dts: Update cache properties for microchip [13/20] arm64: dts: Update cache properties for nuvoton [14/20] arm64: dts: Update cache properties for nvidia [15/20] arm64: dts: Update cache properties for qcom [16/20] arm64: dts: Update cache properties for realtek [17/20] arm64: dts: Update cache properties for renesas [18/20] arm64: dts: Update cache properties for rockchip [19/20] arm64: dts: Update cache properties for synaptics [20/20] arm64: dts: Update cache properties for tesla

Commit Message

Pierre Gondois Oct. 31, 2022, 9:19 a.m. UTC

  The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes

The recently added init_of_cache_level() function checks
these properties. Add them if missing.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
---
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi   | 1 +
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi  | 1 +
 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 +
 arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 1 +
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 1 +
 arch/arm64/boot/dts/amlogic/meson-sm1.dtsi  | 1 +
 6 files changed, 6 insertions(+)

Comments

Neil Armstrong Oct. 31, 2022, 9:51 a.m. UTC | #1

Hi,

On 31/10/2022 10:19, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> 
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.

Is this tied to a bindings change ? Since I'm only in CC to the 02/20 patch,
I don't have the context here.

Neil

> 
> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
> ---
>   arch/arm64/boot/dts/amlogic/meson-a1.dtsi   | 1 +
>   arch/arm64/boot/dts/amlogic/meson-axg.dtsi  | 1 +
>   arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 +
>   arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 1 +
>   arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 1 +
>   arch/arm64/boot/dts/amlogic/meson-sm1.dtsi  | 1 +
>   6 files changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> index b4000cf65a9a..d2f7cb4e5375 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> @@ -36,6 +36,7 @@ cpu1: cpu@1 {
>   
>   		l2: l2-cache0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index 04f797b5a012..1648e67afbb6 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -105,6 +105,7 @@ cpu3: cpu@3 {
>   
>   		l2: l2-cache0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index fb0ab27d1f64..af23d7968181 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -50,6 +50,7 @@ cpu3: cpu@3 {
>   
>   		l2: l2-cache0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> index ee8fcae9f9f0..9978e619accc 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> @@ -105,6 +105,7 @@ cpu103: cpu@103 {
>   
>   		l2: l2-cache0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   };
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> index 023a52005494..e3c12e0be99d 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> @@ -132,6 +132,7 @@ cpu3: cpu@3 {
>   
>   		l2: l2-cache0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> index 80737731af3f..d845eb19d93d 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> @@ -88,6 +88,7 @@ cpu3: cpu@3 {
>   
>   		l2: l2-cache0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>

Pierre Gondois Oct. 31, 2022, 1:33 p.m. UTC | #2

Hello Neil,

On 10/31/22 10:51, Neil Armstrong wrote:
> Hi,
> 
> On 31/10/2022 10:19, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>>
>> The recently added init_of_cache_level() function checks
>> these properties. Add them if missing.
> 
> Is this tied to a bindings change ? Since I'm only in CC to the 02/20 patch,
> I don't have the context here.

It is not tied to a binding change, it is just to align the DTs to the
DeviceTree spec to potentially prepare for having a common DT parsing code.

To avoid cc-ing people to DTs they are not related, the get_maintainers.pl
script was run on each patch individually. The cover-letter is at:
https://lore.kernel.org/all/20221031091848.530938-1-pierre.gondois@arm.com/


> 
> Neil
> 
>>
>> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>> ---
>>    arch/arm64/boot/dts/amlogic/meson-a1.dtsi   | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-axg.dtsi  | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 1 +
>>    arch/arm64/boot/dts/amlogic/meson-sm1.dtsi  | 1 +
>>    6 files changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
>> index b4000cf65a9a..d2f7cb4e5375 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
>> @@ -36,6 +36,7 @@ cpu1: cpu@1 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> index 04f797b5a012..1648e67afbb6 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> @@ -105,6 +105,7 @@ cpu3: cpu@3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> index fb0ab27d1f64..af23d7968181 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> @@ -50,6 +50,7 @@ cpu3: cpu@3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
>> index ee8fcae9f9f0..9978e619accc 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
>> @@ -105,6 +105,7 @@ cpu103: cpu@103 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    };
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> index 023a52005494..e3c12e0be99d 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
>> @@ -132,6 +132,7 @@ cpu3: cpu@3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
>> index 80737731af3f..d845eb19d93d 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
>> @@ -88,6 +88,7 @@ cpu3: cpu@3 {
>>    
>>    		l2: l2-cache0 {
>>    			compatible = "cache";
>> +			cache-level = <2>;
>>    		};
>>    	};
>>    
>

Martin Blumenstingl Oct. 31, 2022, 9:09 p.m. UTC | #3

Hi Pierre,

On Mon, Oct 31, 2022 at 2:33 PM Pierre Gondois <pierre.gondois@arm.com> wrote:
[...]
> To avoid cc-ing people to DTs they are not related, the get_maintainers.pl
> script was run on each patch individually. The cover-letter is at:
> https://lore.kernel.org/all/20221031091848.530938-1-pierre.gondois@arm.com/
I think Neil's question is the same as mine: is there a dt-bindings
(yaml schema) change for this as well? The idea is to alert people (or
let bots alert people) in future when adding a cache to a .dts{,i}
where the cache-level property is missing.

[...]
> >> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Your patch looks good to me. We already use the property on the 32-bit
Amlogic SoCs. So please add my:
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>


Best regards,
Martin

Rob Herring Oct. 31, 2022, 10:19 p.m. UTC | #4

On Mon, Oct 31, 2022 at 4:09 PM Martin Blumenstingl
<martin.blumenstingl@googlemail.com> wrote:
>
> Hi Pierre,
>
> On Mon, Oct 31, 2022 at 2:33 PM Pierre Gondois <pierre.gondois@arm.com> wrote:
> [...]
> > To avoid cc-ing people to DTs they are not related, the get_maintainers.pl
> > script was run on each patch individually. The cover-letter is at:
> > https://lore.kernel.org/all/20221031091848.530938-1-pierre.gondois@arm.com/
> I think Neil's question is the same as mine: is there a dt-bindings
> (yaml schema) change for this as well? The idea is to alert people (or
> let bots alert people) in future when adding a cache to a .dts{,i}
> where the cache-level property is missing.

There's not one, but it's something to look at adding. I'm not sure
how we'd check for missing 'unified-cache' which is a common problem.
The challenge here is a lot of what needs to be checked is based on
the overall structure. This probably is better checked in dtc which is
better suited to do cross node checks.

Rob

Rob Herring Nov. 2, 2022, 2:31 p.m. UTC | #5

On Mon, Oct 31, 2022 at 5:19 PM Rob Herring <robh+dt@kernel.org> wrote:
>
> On Mon, Oct 31, 2022 at 4:09 PM Martin Blumenstingl
> <martin.blumenstingl@googlemail.com> wrote:
> >
> > Hi Pierre,
> >
> > On Mon, Oct 31, 2022 at 2:33 PM Pierre Gondois <pierre.gondois@arm.com> wrote:
> > [...]
> > > To avoid cc-ing people to DTs they are not related, the get_maintainers.pl
> > > script was run on each patch individually. The cover-letter is at:
> > > https://lore.kernel.org/all/20221031091848.530938-1-pierre.gondois@arm.com/
> > I think Neil's question is the same as mine: is there a dt-bindings
> > (yaml schema) change for this as well? The idea is to alert people (or
> > let bots alert people) in future when adding a cache to a .dts{,i}
> > where the cache-level property is missing.
>
> There's not one, but it's something to look at adding. I'm not sure
> how we'd check for missing 'unified-cache' which is a common problem.
> The challenge here is a lot of what needs to be checked is based on
> the overall structure. This probably is better checked in dtc which is
> better suited to do cross node checks.

Now there is an improved binding:

https://github.com/robherring/dt-schema/tree/cache-rework

With that schema and this series applied, I get the following errors:

arch/arm64/boot/dts/socionext/uniphier-ld11-global.dtb: l2-cache:
'cache-level' is a required property
arch/arm64/boot/dts/mediatek/mt8186-evb.dtb: l2-cache0: 'cache-level'
is a required property
arch/arm64/boot/dts/mediatek/mt8186-evb.dtb: l2-cache1: 'cache-level'
is a required property
arch/arm64/boot/dts/mediatek/mt8186-evb.dtb: l3-cache: 'cache-level'
is a required property
arch/arm64/boot/dts/freescale/imx8dxl-evk.dtb: l2-cache0:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dtb: l2-cache:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dtb: l2-cache0:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dtb: l2-cache1:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dtb: l2-cache0:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dtb: l2-cache1:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb: l2-cache0:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb: l2-cache1:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref-gadget0.dtb: l2-cache:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dtb: l2-cache:
'cache-level' is a required property
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref-gadget1.dtb: l2-cache:
'cache-level' is a required property

Cases missing 'cache-unified':

arch/arm64/boot/dts/amazon/alpine-v3-evp.dtb
arch/arm64/boot/dts/arm/corstone1000-fvp.dtb
arch/arm64/boot/dts/arm/corstone1000-mps3.dtb
arch/arm64/boot/dts/arm/juno.dtb
arch/arm64/boot/dts/arm/juno-r1.dtb
arch/arm64/boot/dts/arm/juno-r1-scmi.dtb
arch/arm64/boot/dts/arm/juno-r2.dtb
arch/arm64/boot/dts/arm/juno-r2-scmi.dtb
arch/arm64/boot/dts/arm/juno-scmi.dtb
arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dtb
arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dtb
arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4-io.dtb
arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dtb
arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dtb
arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dtb
arch/arm64/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dtb
arch/arm64/boot/dts/broadcom/bcm2837-rpi-zero-2-w.dtb
arch/arm64/boot/dts/exynos/exynos5433-tm2.dtb
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dtb
arch/arm64/boot/dts/exynos/exynos7-espresso.dtb
arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dtb
arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3-rev-a.dtb
arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dtb
arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dtb
arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dtb
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dtb
arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dtb
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dtb
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dtb
arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dtb
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mn-evk.dtb
arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dtb
arch/arm64/boot/dts/freescale/imx8mp-evk.dtb
arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dtb
arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dtb
arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dtb
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dtb
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb
arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb
arch/arm64/boot/dts/marvell/armada-7040-db.dtb
arch/arm64/boot/dts/marvell/armada-7040-mochabin.dtb
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dtb
arch/arm64/boot/dts/marvell/armada-8040-db.dtb
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtb
arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dtb
arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dtb
arch/arm64/boot/dts/marvell/cn9130-crb-A.dtb
arch/arm64/boot/dts/marvell/cn9130-crb-B.dtb
arch/arm64/boot/dts/marvell/cn9130-db-B.dtb
arch/arm64/boot/dts/marvell/cn9130-db.dtb
arch/arm64/boot/dts/marvell/cn9131-db-B.dtb
arch/arm64/boot/dts/marvell/cn9131-db.dtb
arch/arm64/boot/dts/marvell/cn9132-db-B.dtb
arch/arm64/boot/dts/marvell/cn9132-db.dtb
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dtb
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0000.dtb
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dtb
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dtb
arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dtb
arch/arm64/boot/dts/tesla/fsd-evb.dtb
arch/arm64/boot/dts/ti/k3-am625-sk.dtb
arch/arm64/boot/dts/ti/k3-am62a7-sk.dtb
arch/arm64/boot/dts/ti/k3-am642-sk.dtb
arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dtb
arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dtb
arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dtb
arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dtb
arch/arm64/boot/dts/ti/k3-am654-base-board.dtb
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dtb
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dtb
arch/arm64/boot/dts/ti/k3-j721e-sk.dtb
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dtb


Rob

Pierre Gondois Nov. 7, 2022, 4:12 p.m. UTC | #6

Hello Rob,

On 11/2/22 15:31, Rob Herring wrote:
> On Mon, Oct 31, 2022 at 5:19 PM Rob Herring <robh+dt@kernel.org> wrote:
>>
>> On Mon, Oct 31, 2022 at 4:09 PM Martin Blumenstingl
>> <martin.blumenstingl@googlemail.com> wrote:
>>>
>>> Hi Pierre,
>>>
>>> On Mon, Oct 31, 2022 at 2:33 PM Pierre Gondois <pierre.gondois@arm.com> wrote:
>>> [...]
>>>> To avoid cc-ing people to DTs they are not related, the get_maintainers.pl
>>>> script was run on each patch individually. The cover-letter is at:
>>>> https://lore.kernel.org/all/20221031091848.530938-1-pierre.gondois@arm.com/
>>> I think Neil's question is the same as mine: is there a dt-bindings
>>> (yaml schema) change for this as well? The idea is to alert people (or
>>> let bots alert people) in future when adding a cache to a .dts{,i}
>>> where the cache-level property is missing.
>>
>> There's not one, but it's something to look at adding. I'm not sure
>> how we'd check for missing 'unified-cache' which is a common problem.
>> The challenge here is a lot of what needs to be checked is based on
>> the overall structure. This probably is better checked in dtc which is
>> better suited to do cross node checks.
> 
> Now there is an improved binding:
> 
> https://github.com/robherring/dt-schema/tree/cache-rework

Thanks for the branch, I used it to make the v2. I don't think it is likely
to happen, but dt-schema doesn't generate a warning if there is a
'unified-cache' property along a '[d|i]-cache-size' property (for instance).

> 
> With that schema and this series applied, I get the following errors:
> 
> arch/arm64/boot/dts/socionext/uniphier-ld11-global.dtb: l2-cache:
> 'cache-level' is a required property
> arch/arm64/boot/dts/mediatek/mt8186-evb.dtb: l2-cache0: 'cache-level'
> is a required property
> arch/arm64/boot/dts/mediatek/mt8186-evb.dtb: l2-cache1: 'cache-level'
> is a required property
> arch/arm64/boot/dts/mediatek/mt8186-evb.dtb: l3-cache: 'cache-level'
> is a required property
> arch/arm64/boot/dts/freescale/imx8dxl-evk.dtb: l2-cache0:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dtb: l2-cache:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dtb: l2-cache0:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dtb: l2-cache1:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld20-global.dtb: l2-cache0:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld20-global.dtb: l2-cache1:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb: l2-cache0:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb: l2-cache1:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-pxs3-ref-gadget0.dtb: l2-cache:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dtb: l2-cache:
> 'cache-level' is a required property
> arch/arm64/boot/dts/socionext/uniphier-pxs3-ref-gadget1.dtb: l2-cache:
> 'cache-level' is a required property
> 
> Cases missing 'cache-unified':
> 
> arch/arm64/boot/dts/amazon/alpine-v3-evp.dtb
> arch/arm64/boot/dts/arm/corstone1000-fvp.dtb
> arch/arm64/boot/dts/arm/corstone1000-mps3.dtb
> arch/arm64/boot/dts/arm/juno.dtb
> arch/arm64/boot/dts/arm/juno-r1.dtb
> arch/arm64/boot/dts/arm/juno-r1-scmi.dtb
> arch/arm64/boot/dts/arm/juno-r2.dtb
> arch/arm64/boot/dts/arm/juno-r2-scmi.dtb
> arch/arm64/boot/dts/arm/juno-scmi.dtb
> arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dtb
> arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dtb
> arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4-io.dtb
> arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-a-plus.dtb
> arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dtb
> arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dtb
> arch/arm64/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dtb
> arch/arm64/boot/dts/broadcom/bcm2837-rpi-zero-2-w.dtb
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dtb
> arch/arm64/boot/dts/exynos/exynos5433-tm2e.dtb
> arch/arm64/boot/dts/exynos/exynos7-espresso.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3-rev-a.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dtb
> arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dtb
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dtb
> arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dtb
> arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mn-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dtb
> arch/arm64/boot/dts/freescale/imx8mp-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dtb
> arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dtb
> arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dtb
> arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dtb
> arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb
> arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
> arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
> arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
> arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
> arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
> arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
> arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
> arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb
> arch/arm64/boot/dts/marvell/armada-7040-db.dtb
> arch/arm64/boot/dts/marvell/armada-7040-mochabin.dtb
> arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dtb
> arch/arm64/boot/dts/marvell/armada-8040-db.dtb
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtb
> arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dtb
> arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dtb
> arch/arm64/boot/dts/marvell/cn9130-crb-A.dtb
> arch/arm64/boot/dts/marvell/cn9130-crb-B.dtb
> arch/arm64/boot/dts/marvell/cn9130-db-B.dtb
> arch/arm64/boot/dts/marvell/cn9130-db.dtb
> arch/arm64/boot/dts/marvell/cn9131-db-B.dtb
> arch/arm64/boot/dts/marvell/cn9131-db.dtb
> arch/arm64/boot/dts/marvell/cn9132-db-B.dtb
> arch/arm64/boot/dts/marvell/cn9132-db.dtb
> arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dtb
> arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0000.dtb
> arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dtb
> arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dtb
> arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dtb
> arch/arm64/boot/dts/tesla/fsd-evb.dtb
> arch/arm64/boot/dts/ti/k3-am625-sk.dtb
> arch/arm64/boot/dts/ti/k3-am62a7-sk.dtb
> arch/arm64/boot/dts/ti/k3-am642-sk.dtb
> arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dtb
> arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dtb
> arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dtb
> arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dtb
> arch/arm64/boot/dts/ti/k3-am654-base-board.dtb
> arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dtb
> arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dtb
> arch/arm64/boot/dts/ti/k3-j721e-sk.dtb
> arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dtb
> 
> 
> Rob

diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index b4000cf65a9a..d2f7cb4e5375 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -36,6 +36,7 @@  cpu1: cpu@1 {
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 04f797b5a012..1648e67afbb6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -105,6 +105,7 @@  cpu3: cpu@3 {
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index fb0ab27d1f64..af23d7968181 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -50,6 +50,7 @@  cpu3: cpu@3 {
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
index ee8fcae9f9f0..9978e619accc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
@@ -105,6 +105,7 @@  cpu103: cpu@103 {
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 023a52005494..e3c12e0be99d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -132,6 +132,7 @@  cpu3: cpu@3 {
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
index 80737731af3f..d845eb19d93d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
@@ -88,6 +88,7 @@  cpu3: cpu@3 {
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
 		};
 	};