Message ID | 20230511092843.3896327-1-nphamcs@gmail.com |
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State | New |
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[2a03:2880:ff:13::face:b00c]) by smtp.gmail.com with ESMTPSA id 13-20020a170902e9cd00b001ab0669d84csm5407877plk.26.2023.05.11.02.28.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 02:28:44 -0700 (PDT) From: Nhat Pham <nphamcs@gmail.com> To: akpm@linux-foundation.org Cc: linux-api@vger.kernel.org, kernel-team@meta.com, linux-arch@vger.kernel.org, hannes@cmpxchg.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, arnd@arndb.de, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: wire up cachestat for arm64 Date: Thu, 11 May 2023 02:28:43 -0700 Message-Id: <20230511092843.3896327-1-nphamcs@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230510195806.2902878-1-nphamcs@gmail.com> References: <20230510195806.2902878-1-nphamcs@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765589604551622170?= X-GMAIL-MSGID: =?utf-8?q?1765589604551622170?= |
Series |
arm64: wire up cachestat for arm64
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Commit Message
Nhat Pham
May 11, 2023, 9:28 a.m. UTC
cachestat is a new syscall that was previously wired in for most
architectures:
https://lore.kernel.org/lkml/20230503013608.2431726-1-nphamcs@gmail.com/
https://lore.kernel.org/linux-mm/20230510195806.2902878-1-nphamcs@gmail.com/
However, those patches miss arm64, which has its own syscall table in arch/arm64.
This patch wires cachestat in for arm64.
Signed-off-by: Nhat Pham <nphamcs@gmail.com>
Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm64/include/asm/unistd.h | 2 +-
arch/arm64/include/asm/unistd32.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
Comments
On Thu, May 11, 2023, at 11:28, Nhat Pham wrote: > cachestat is a new syscall that was previously wired in for most > architectures: > > https://lore.kernel.org/lkml/20230503013608.2431726-1-nphamcs@gmail.com/ > https://lore.kernel.org/linux-mm/20230510195806.2902878-1-nphamcs@gmail.com/ > > However, those patches miss arm64, which has its own syscall table in > arch/arm64. > This patch wires cachestat in for arm64. > > Signed-off-by: Nhat Pham <nphamcs@gmail.com> > Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> > Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
On Thu, May 11, 2023 at 02:28:43AM -0700, Nhat Pham wrote: > cachestat is a new syscall that was previously wired in for most > architectures: > > https://lore.kernel.org/lkml/20230503013608.2431726-1-nphamcs@gmail.com/ > https://lore.kernel.org/linux-mm/20230510195806.2902878-1-nphamcs@gmail.com/ > > However, those patches miss arm64, which has its own syscall table in arch/arm64. > This patch wires cachestat in for arm64. You may want to clarify that this is for compat support on arm64, otherwise native support uses the generic syscall numbers already. > > Signed-off-by: Nhat Pham <nphamcs@gmail.com> > Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> > Suggested-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
On Fri, 12 May 2023 11:42:26 +0100 Catalin Marinas <catalin.marinas@arm.com> wrote: > On Thu, May 11, 2023 at 02:28:43AM -0700, Nhat Pham wrote: > > cachestat is a new syscall that was previously wired in for most > > architectures: > > > > https://lore.kernel.org/lkml/20230503013608.2431726-1-nphamcs@gmail.com/ > > https://lore.kernel.org/linux-mm/20230510195806.2902878-1-nphamcs@gmail.com/ > > > > However, those patches miss arm64, which has its own syscall table in arch/arm64. > > This patch wires cachestat in for arm64. > > You may want to clarify that this is for compat support on arm64, > otherwise native support uses the generic syscall numbers already. Thanks, I updated the changelog thusly. Note that this patch is transitory - it will be squashed into "cachestat: wire up cachestat for other architectures".
On Fri, May 12, 2023 at 2:15 PM Andrew Morton <akpm@linux-foundation.org> wrote: > > On Fri, 12 May 2023 11:42:26 +0100 Catalin Marinas <catalin.marinas@arm.com> wrote: > > > On Thu, May 11, 2023 at 02:28:43AM -0700, Nhat Pham wrote: > > > cachestat is a new syscall that was previously wired in for most > > > architectures: > > > > > > https://lore.kernel.org/lkml/20230503013608.2431726-1-nphamcs@gmail.com/ > > > https://lore.kernel.org/linux-mm/20230510195806.2902878-1-nphamcs@gmail.com/ > > > > > > However, those patches miss arm64, which has its own syscall table in arch/arm64. > > > This patch wires cachestat in for arm64. > > > > You may want to clarify that this is for compat support on arm64, > > otherwise native support uses the generic syscall numbers already. > > Thanks, I updated the changelog thusly. Note that this patch is > transitory - it will be squashed into "cachestat: wire up cachestat for > other architectures". It's my expectation too - it makes sense to squash it to the other patch. Thanks, Andrew!
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h index 037feba03a51..64a514f90131 100644 --- a/arch/arm64/include/asm/unistd.h +++ b/arch/arm64/include/asm/unistd.h @@ -39,7 +39,7 @@ #define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE + 5) #define __ARM_NR_COMPAT_END (__ARM_NR_COMPAT_BASE + 0x800) -#define __NR_compat_syscalls 451 +#define __NR_compat_syscalls 452 #endif #define __ARCH_WANT_SYS_CLONE diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h index 604a2053d006..d952a28463e0 100644 --- a/arch/arm64/include/asm/unistd32.h +++ b/arch/arm64/include/asm/unistd32.h @@ -907,6 +907,8 @@ __SYSCALL(__NR_process_mrelease, sys_process_mrelease) __SYSCALL(__NR_futex_waitv, sys_futex_waitv) #define __NR_set_mempolicy_home_node 450 __SYSCALL(__NR_set_mempolicy_home_node, sys_set_mempolicy_home_node) +#define __NR_cachestat 451 +__SYSCALL(__NR_cachestat, sys_cachestat) /* * Please add new compat syscalls above this comment and update