Message ID | 20230512022036.97987-6-xingyu.wu@starfivetech.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u13-20020a17090ae00d00b0024ddf090102si31743465pjy.56.2023.05.11.19.23.43; Thu, 11 May 2023 19:23:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239776AbjELCW3 convert rfc822-to-8bit (ORCPT <rfc822;peekingduck44@gmail.com> + 99 others); Thu, 11 May 2023 22:22:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239779AbjELCWW (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 11 May 2023 22:22:22 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70A3259F1; Thu, 11 May 2023 19:22:19 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 7E33E8159; Fri, 12 May 2023 10:22:17 +0800 (CST) Received: from EXMBX061.cuchost.com (172.16.6.61) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 12 May 2023 10:22:17 +0800 Received: from localhost.localdomain (113.72.146.187) by EXMBX061.cuchost.com (172.16.6.61) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 12 May 2023 10:22:16 +0800 From: Xingyu Wu <xingyu.wu@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>, "Michael Turquette" <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Philipp Zabel <p.zabel@pengutronix.de>, Conor Dooley <conor@kernel.org>, "Emil Renner Berthing" <kernel@esmil.dk> CC: Rob Herring <robh+dt@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, Xingyu Wu <xingyu.wu@starfivetech.com>, William Qiu <william.qiu@starfivetech.com>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v4 5/7] dt-bindings: soc: starfive: Add StarFive syscon module Date: Fri, 12 May 2023 10:20:34 +0800 Message-ID: <20230512022036.97987-6-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230512022036.97987-1-xingyu.wu@starfivetech.com> References: <20230512022036.97987-1-xingyu.wu@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [113.72.146.187] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX061.cuchost.com (172.16.6.61) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765653333721191280?= X-GMAIL-MSGID: =?utf-8?q?1765653333721191280?= |
Series |
Add PLL clocks driver and syscon for StarFive JH7110 SoC
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Commit Message
Xingyu Wu
May 12, 2023, 2:20 a.m. UTC
From: William Qiu <william.qiu@starfivetech.com> Add documentation to describe StarFive System Controller Registers. Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: William Qiu <william.qiu@starfivetech.com> --- .../soc/starfive/starfive,jh7110-syscon.yaml | 67 +++++++++++++++++++ MAINTAINERS | 7 ++ 2 files changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
Comments
On 12/05/2023 04:20, Xingyu Wu wrote: > From: William Qiu <william.qiu@starfivetech.com> > > Add documentation to describe StarFive System Controller Registers. > > Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com> > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > Reviewed-by: Rob Herring <robh@kernel.org> You made significant changes. Explain them in changelog here and drop the tag. > Signed-off-by: William Qiu <william.qiu@starfivetech.com> > --- > .../soc/starfive/starfive,jh7110-syscon.yaml | 67 +++++++++++++++++++ > MAINTAINERS | 7 ++ > 2 files changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > > diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > new file mode 100644 > index 000000000000..26dc99cb0c89 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive JH7110 SoC system controller > + > +maintainers: > + - William Qiu <william.qiu@starfivetech.com> > + > +description: | > + The StarFive JH7110 SoC system controller provides register information such > + as offset, mask and shift to configure related modules such as MMC and PCIe. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: starfive,jh7110-sys-syscon > + - const: syscon > + - const: simple-mfd > + - items: > + - enum: > + - starfive,jh7110-aon-syscon > + - starfive,jh7110-stg-syscon > + - const: syscon > + > + reg: > + maxItems: 1 > + > + clock-controller: > + $ref: /schemas/clock/starfive,jh7110-pll.yaml# > + type: object > + > + "#power-domain-cells": > + const: 1 Add it to the existing examples. This part confuses me... why aon appeared here? Why power-controller disappeared? I don't think that Rob or me proposed any of this. > + > +required: > + - compatible > + - reg > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: starfive,jh7110-aon-syscon > + then: > + required: > + - "#power-domain-cells" > + > +additionalProperties: false > + > +examples: > + - | > + syscon@10240000 { > + compatible = "starfive,jh7110-stg-syscon", "syscon"; > + reg = <0x10240000 0x1000>; > + }; > + > + syscon@13030000 { > + compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; > + reg = <0x13030000 0x1000>; Why simple-mfd? You do not have any children here. Best regards, Krzysztof
On Fri, May 12, 2023 at 08:35:43AM +0200, Krzysztof Kozlowski wrote: > On 12/05/2023 04:20, Xingyu Wu wrote: > > From: William Qiu <william.qiu@starfivetech.com> > > + "#power-domain-cells": > > + const: 1 > > Add it to the existing examples. > > This part confuses me... why aon appeared here? Why power-controller > disappeared? I don't think that Rob or me proposed any of this. Rob did actually suggest this, as the power-controller child node had no properties other than #power-domain-cells.
On 12/05/2023 08:43, Conor Dooley wrote: > On Fri, May 12, 2023 at 08:35:43AM +0200, Krzysztof Kozlowski wrote: >> On 12/05/2023 04:20, Xingyu Wu wrote: >>> From: William Qiu <william.qiu@starfivetech.com> > >>> + "#power-domain-cells": >>> + const: 1 >> >> Add it to the existing examples. >> >> This part confuses me... why aon appeared here? Why power-controller >> disappeared? I don't think that Rob or me proposed any of this. > > Rob did actually suggest this, as the power-controller child node had no > properties other than #power-domain-cells. He suggested it for aon, but not for stg or sys... aon is not a child of sys, is it? Then why power-controller disappeared from sys? Best regards, Krzysztof
On Fri, 12 May 2023 10:20:34 +0800, Xingyu Wu wrote: > From: William Qiu <william.qiu@starfivetech.com> > > Add documentation to describe StarFive System Controller Registers. > > Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com> > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: William Qiu <william.qiu@starfivetech.com> > --- > .../soc/starfive/starfive,jh7110-syscon.yaml | 67 +++++++++++++++++++ > MAINTAINERS | 7 ++ > 2 files changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: ./Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml: Unable to find schema file matching $id: http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml See https://patchwork.ozlabs.org/patch/1780353 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On 2023/5/12 14:50, Krzysztof Kozlowski wrote: > On 12/05/2023 08:43, Conor Dooley wrote: >> On Fri, May 12, 2023 at 08:35:43AM +0200, Krzysztof Kozlowski wrote: >>> On 12/05/2023 04:20, Xingyu Wu wrote: >>>> From: William Qiu <william.qiu@starfivetech.com> >> >>>> + "#power-domain-cells": >>>> + const: 1 >>> >>> Add it to the existing examples. >>> >>> This part confuses me... why aon appeared here? Why power-controller >>> disappeared? I don't think that Rob or me proposed any of this. >> >> Rob did actually suggest this, as the power-controller child node had no >> properties other than #power-domain-cells. > > He suggested it for aon, but not for stg or sys... aon is not a child of > sys, is it? Then why power-controller disappeared from sys? > The power-controller is only for aon, but now just use power-domain-cells instead. The sys only have the clock-controller child node not power-controller. And stg has neither. Best regards, Xingyu Wu
On 12/05/2023 09:24, Xingyu Wu wrote: > On 2023/5/12 14:50, Krzysztof Kozlowski wrote: >> On 12/05/2023 08:43, Conor Dooley wrote: >>> On Fri, May 12, 2023 at 08:35:43AM +0200, Krzysztof Kozlowski wrote: >>>> On 12/05/2023 04:20, Xingyu Wu wrote: >>>>> From: William Qiu <william.qiu@starfivetech.com> >>> >>>>> + "#power-domain-cells": >>>>> + const: 1 >>>> >>>> Add it to the existing examples. >>>> >>>> This part confuses me... why aon appeared here? Why power-controller >>>> disappeared? I don't think that Rob or me proposed any of this. >>> >>> Rob did actually suggest this, as the power-controller child node had no >>> properties other than #power-domain-cells. >> >> He suggested it for aon, but not for stg or sys... aon is not a child of >> sys, is it? Then why power-controller disappeared from sys? >> > > The power-controller is only for aon, but now just use power-domain-cells instead. > The sys only have the clock-controller child node not power-controller. > And stg has neither. OK, I see. Stuffing all of them in one binding suggests that anything can be anything, but you actually have different devices with different features/roles. Best regards, Krzysztof
On 2023/5/12 14:50, Krzysztof Kozlowski wrote: > On Fri, 12 May 2023 10:20:34 +0800, Xingyu Wu wrote: >> From: William Qiu <william.qiu@starfivetech.com> >> >> Add documentation to describe StarFive System Controller Registers. >> >> Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com> >> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> >> Reviewed-by: Rob Herring <robh@kernel.org> >> Signed-off-by: William Qiu <william.qiu@starfivetech.com> >> --- >> .../soc/starfive/starfive,jh7110-syscon.yaml | 67 +++++++++++++++++++ >> MAINTAINERS | 7 ++ >> 2 files changed, 74 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml >> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > ./Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml: Unable to find schema file matching $id: http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml > > See https://patchwork.ozlabs.org/patch/1780353 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. This patch need patch 1 about pll clock driver binding. Do I need to merge syscon binding and pll binding together? Best regards, Xingyu Wu
On 12/05/2023 09:51, Xingyu Wu wrote: > On 2023/5/12 14:50, Krzysztof Kozlowski wrote: >> On Fri, 12 May 2023 10:20:34 +0800, Xingyu Wu wrote: >>> From: William Qiu <william.qiu@starfivetech.com> >>> >>> Add documentation to describe StarFive System Controller Registers. >>> >>> Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com> >>> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> >>> Reviewed-by: Rob Herring <robh@kernel.org> >>> Signed-off-by: William Qiu <william.qiu@starfivetech.com> >>> --- >>> .../soc/starfive/starfive,jh7110-syscon.yaml | 67 +++++++++++++++++++ >>> MAINTAINERS | 7 ++ >>> 2 files changed, 74 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml >>> >> >> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' >> on your patch (DT_CHECKER_FLAGS is new in v5.13): >> >> yamllint warnings/errors: >> >> dtschema/dtc warnings/errors: >> ./Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml: Unable to find schema file matching $id: http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml >> >> See https://patchwork.ozlabs.org/patch/1780353 >> >> This check can fail if there are any dependencies. The base for a patch >> series is generally the most recent rc1. >> >> If you already ran 'make dt_binding_check' and didn't see the above >> error(s), then make sure 'yamllint' is installed and dt-schema is up to >> date: >> >> pip3 install dtschema --upgrade >> >> Please check and re-submit. > > This patch need patch 1 about pll clock driver binding. > Do I need to merge syscon binding and pll binding together? No, bot has hickups due to failures in Linus' tree, thus false positives are possible. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml new file mode 100644 index 000000000000..26dc99cb0c89 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 SoC system controller + +maintainers: + - William Qiu <william.qiu@starfivetech.com> + +description: | + The StarFive JH7110 SoC system controller provides register information such + as offset, mask and shift to configure related modules such as MMC and PCIe. + +properties: + compatible: + oneOf: + - items: + - const: starfive,jh7110-sys-syscon + - const: syscon + - const: simple-mfd + - items: + - enum: + - starfive,jh7110-aon-syscon + - starfive,jh7110-stg-syscon + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/starfive,jh7110-pll.yaml# + type: object + + "#power-domain-cells": + const: 1 + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: starfive,jh7110-aon-syscon + then: + required: + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + syscon@10240000 { + compatible = "starfive,jh7110-stg-syscon", "syscon"; + reg = <0x10240000 0x1000>; + }; + + syscon@13030000 { + compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; + reg = <0x13030000 0x1000>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 0fb4a703f66f..60bbc3a05d79 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20093,6 +20093,12 @@ S: Supported F: Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml F: drivers/clk/starfive/clk-starfive-jh7110-pll.* +STARFIVE JH7110 SYSCON +M: William Qiu <william.qiu@starfivetech.com> +M: Xingyu Wu <xingyu.wu@starfivetech.com> +S: Supported +F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml + STARFIVE JH71X0 CLOCK DRIVERS M: Emil Renner Berthing <kernel@esmil.dk> M: Hal Feng <hal.feng@starfivetech.com> @@ -20130,6 +20136,7 @@ STARFIVE SOC DRIVERS M: Conor Dooley <conor@kernel.org> S: Maintained T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ +F: Documentation/devicetree/bindings/soc/starfive/ F: drivers/soc/starfive/ STARFIVE TRNG DRIVER