Message ID | 20230423141051.702990-13-mwen@igalia.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h16-20020a17090acf1000b0024715c041c3si11694870pju.137.2023.04.23.07.48.40; Sun, 23 Apr 2023 07:48:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b=gmOQ3q2n; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229493AbjDWOOE (ORCPT <rfc822;fengqi706@gmail.com> + 99 others); Sun, 23 Apr 2023 10:14:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229619AbjDWOOD (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Sun, 23 Apr 2023 10:14:03 -0400 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D355330FE for <linux-kernel@vger.kernel.org>; Sun, 23 Apr 2023 07:13:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=mNxdNED6L3HES4VBefAtsG63OTHIZrslESDcQiiim+M=; b=gmOQ3q2nfwj0Oz9By8BoODLpBY nlWFvAuX/nCjrsoRwqBnOvu2066ZTKBbV1SErilbIPPRLrxBtV/KWPbid0GMIyO0efOPS2r9whq0A zJStCM0vdyqfTIqe/n3FV9tKSV0Za4BhoTjefXnGciV3+7B4cIVtyUf4ZbL3mD5bi+9yctwQHIEfJ n9rskomfSRZN28dlPi6qFZPvlKXDWiYCorGwQblxgtaBjG22jhYjdJ3T/Y83k66Nf0wQ6tDd5VRv+ /WmFasbZZ6REAydvn3Edv4Yoeoc1HzxVBaY/iWeNkA2aCk9I39lVyGQ7bW1YmWLYStAvpVPKJJy65 k3LsJHwA==; Received: from nat-wifi.fi.muni.cz ([147.251.43.9] helo=killbill.fi.muni.cz) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pqaSA-00ANVs-GB; Sun, 23 Apr 2023 16:12:34 +0200 From: Melissa Wen <mwen@igalia.com> To: amd-gfx@lists.freedesktop.org, Harry Wentland <harry.wentland@amd.com>, Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>, sunpeng.li@amd.com, Alex Deucher <alexander.deucher@amd.com>, dri-devel@lists.freedesktop.org, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton <joshua@froggi.es>, Sebastian Wick <sebastian.wick@redhat.com>, Xaver Hugl <xaver.hugl@gmail.com>, Shashank Sharma <Shashank.Sharma@amd.com>, Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>, sungjoon.kim@amd.com, Alex Hung <alex.hung@amd.com>, Melissa Wen <mwen@igalia.com>, linux-kernel@vger.kernel.org Subject: [RFC PATCH 12/40] drm/amd/display: add plane HDR multiplier driver-private property Date: Sun, 23 Apr 2023 13:10:24 -0100 Message-Id: <20230423141051.702990-13-mwen@igalia.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230423141051.702990-1-mwen@igalia.com> References: <20230423141051.702990-1-mwen@igalia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763978861458876632?= X-GMAIL-MSGID: =?utf-8?q?1763978861458876632?= |
Series |
drm/amd/display: add AMD driver-specific properties for color mgmt
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Commit Message
Melissa Wen
April 23, 2023, 2:10 p.m. UTC
From: Joshua Ashton <joshua@froggi.es> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 nits for SDR content. So if you want, 203 nits for SDR content, pass in (203.0 / 80.0). Co-developed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> --- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- 4 files changed, 41 insertions(+), 6 deletions(-)
Comments
On 4/23/23 10:10, Melissa Wen wrote: > From: Joshua Ashton <joshua@froggi.es> > > Multiplier to 'gain' the plane. When PQ is decoded using the fixed func > transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at > least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 > nits for SDR content. So if you want, 203 nits for SDR content, pass in > (203.0 / 80.0). > Is gamescope intending to use this? Harry > Co-developed-by: Melissa Wen <mwen@igalia.com> > Signed-off-by: Melissa Wen <mwen@igalia.com> > Signed-off-by: Joshua Ashton <joshua@froggi.es> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ > .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- > 4 files changed, 41 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > index 24595906dab1..dd658f162f6f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) > return -ENOMEM; > adev->mode_info.plane_degamma_tf_property = prop; > > + prop = drm_property_create_range(adev_to_drm(adev), > + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); > + if (!prop) > + return -ENOMEM; > + adev->mode_info.plane_hdr_mult_property = prop; > + > return 0; > } > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > index ab9ce6f26c90..65a9d62ffbe4 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > @@ -387,6 +387,10 @@ struct amdgpu_mode_info { > * linearize content with or without LUT. > */ > struct drm_property *plane_degamma_tf_property; > + /** > + * @plane_hdr_mult_property: > + */ > + struct drm_property *plane_hdr_mult_property; > #endif > }; > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > index 005632c1c9ec..bb7307b9cfd5 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > @@ -51,6 +51,7 @@ > > #define AMDGPU_DMUB_NOTIFICATION_MAX 5 > > +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) > /* > #include "include/amdgpu_dal_power_if.h" > #include "amdgpu_dm_irq.h" > @@ -736,6 +737,17 @@ struct dm_plane_state { > * linearize. > */ > enum drm_transfer_function degamma_tf; > + /** > + * @hdr_mult: > + * > + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed > + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on > + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. > + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you > + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is > + * S31.32 sign-magnitude. > + */ > + __u64 hdr_mult; > #endif > }; > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > index 5b458cc0781c..57169dae8b3d 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) > __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); > > #ifdef CONFIG_STEAM_DECK > - if (amdgpu_state) > + if (amdgpu_state) { > amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; > + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; > + } > #endif > } > > @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, > #ifdef CONFIG_STEAM_DECK > int > amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, > - struct drm_property_blob **blob, > - uint64_t blob_id, > - ssize_t expected_size, > - ssize_t expected_elem_size, > - bool *replaced) > + struct drm_property_blob **blob, > + uint64_t blob_id, > + ssize_t expected_size, > + ssize_t expected_elem_size, > + bool *replaced) > { > struct drm_property_blob *new_blob = NULL; > > @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, > dm->adev->mode_info.plane_degamma_tf_property, > DRM_TRANSFER_FUNCTION_DEFAULT); > } > + /* HDR MULT is always available */ > + drm_object_attach_property(&plane->base, > + dm->adev->mode_info.plane_hdr_mult_property, > + AMDGPU_HDR_MULT_DEFAULT); > } > > static int > @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, > dm_plane_state->degamma_tf = val; > dm_plane_state->base.color_mgmt_changed = 1; > } > + } else if (property == adev->mode_info.plane_hdr_mult_property) { > + if (dm_plane_state->hdr_mult != val) { > + dm_plane_state->hdr_mult = val; > + dm_plane_state->base.color_mgmt_changed = 1; > + } > } else { > drm_dbg_atomic(plane->dev, > "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", > @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, > dm_plane_state->degamma_lut->base.id : 0; > } else if (property == adev->mode_info.plane_degamma_tf_property) { > *val = dm_plane_state->degamma_tf; > + } else if (property == adev->mode_info.plane_hdr_mult_property) { > + *val = dm_plane_state->hdr_mult; > } else { > return -EINVAL; > }
On 05/08, Harry Wentland wrote: > > > On 4/23/23 10:10, Melissa Wen wrote: > > From: Joshua Ashton <joshua@froggi.es> > > > > Multiplier to 'gain' the plane. When PQ is decoded using the fixed func > > transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at > > least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 > > nits for SDR content. So if you want, 203 nits for SDR content, pass in > > (203.0 / 80.0). > > > > Is gamescope intending to use this? I don't think so. Again, I'll double check and drop it accordingly. Melissa > > Harry > > > Co-developed-by: Melissa Wen <mwen@igalia.com> > > Signed-off-by: Melissa Wen <mwen@igalia.com> > > Signed-off-by: Joshua Ashton <joshua@froggi.es> > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ > > drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ > > .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- > > 4 files changed, 41 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > > index 24595906dab1..dd658f162f6f 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > > @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) > > return -ENOMEM; > > adev->mode_info.plane_degamma_tf_property = prop; > > > > + prop = drm_property_create_range(adev_to_drm(adev), > > + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); > > + if (!prop) > > + return -ENOMEM; > > + adev->mode_info.plane_hdr_mult_property = prop; > > + > > return 0; > > } > > #endif > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > > index ab9ce6f26c90..65a9d62ffbe4 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > > @@ -387,6 +387,10 @@ struct amdgpu_mode_info { > > * linearize content with or without LUT. > > */ > > struct drm_property *plane_degamma_tf_property; > > + /** > > + * @plane_hdr_mult_property: > > + */ > > + struct drm_property *plane_hdr_mult_property; > > #endif > > }; > > > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > > index 005632c1c9ec..bb7307b9cfd5 100644 > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > > @@ -51,6 +51,7 @@ > > > > #define AMDGPU_DMUB_NOTIFICATION_MAX 5 > > > > +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) > > /* > > #include "include/amdgpu_dal_power_if.h" > > #include "amdgpu_dm_irq.h" > > @@ -736,6 +737,17 @@ struct dm_plane_state { > > * linearize. > > */ > > enum drm_transfer_function degamma_tf; > > + /** > > + * @hdr_mult: > > + * > > + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed > > + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on > > + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. > > + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you > > + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is > > + * S31.32 sign-magnitude. > > + */ > > + __u64 hdr_mult; > > #endif > > }; > > > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > > index 5b458cc0781c..57169dae8b3d 100644 > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > > @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) > > __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); > > > > #ifdef CONFIG_STEAM_DECK > > - if (amdgpu_state) > > + if (amdgpu_state) { > > amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; > > + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; > > + } > > #endif > > } > > > > @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, > > #ifdef CONFIG_STEAM_DECK > > int > > amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, > > - struct drm_property_blob **blob, > > - uint64_t blob_id, > > - ssize_t expected_size, > > - ssize_t expected_elem_size, > > - bool *replaced) > > + struct drm_property_blob **blob, > > + uint64_t blob_id, > > + ssize_t expected_size, > > + ssize_t expected_elem_size, > > + bool *replaced) > > { > > struct drm_property_blob *new_blob = NULL; > > > > @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, > > dm->adev->mode_info.plane_degamma_tf_property, > > DRM_TRANSFER_FUNCTION_DEFAULT); > > } > > + /* HDR MULT is always available */ > > + drm_object_attach_property(&plane->base, > > + dm->adev->mode_info.plane_hdr_mult_property, > > + AMDGPU_HDR_MULT_DEFAULT); > > } > > > > static int > > @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, > > dm_plane_state->degamma_tf = val; > > dm_plane_state->base.color_mgmt_changed = 1; > > } > > + } else if (property == adev->mode_info.plane_hdr_mult_property) { > > + if (dm_plane_state->hdr_mult != val) { > > + dm_plane_state->hdr_mult = val; > > + dm_plane_state->base.color_mgmt_changed = 1; > > + } > > } else { > > drm_dbg_atomic(plane->dev, > > "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", > > @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, > > dm_plane_state->degamma_lut->base.id : 0; > > } else if (property == adev->mode_info.plane_degamma_tf_property) { > > *val = dm_plane_state->degamma_tf; > > + } else if (property == adev->mode_info.plane_hdr_mult_property) { > > + *val = dm_plane_state->hdr_mult; > > } else { > > return -EINVAL; > > } > >
We currently do not have a use for this as we settled on per-plane 3D LUT + Shaper, but we might end up wanting to use in our scRGB stack someday so I would like to keep it. On Tue, 9 May 2023 at 16:37, Melissa Wen <mwen@igalia.com> wrote: > > On 05/08, Harry Wentland wrote: > > > > > > On 4/23/23 10:10, Melissa Wen wrote: > > > From: Joshua Ashton <joshua@froggi.es> > > > > > > Multiplier to 'gain' the plane. When PQ is decoded using the fixed func > > > transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at > > > least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 > > > nits for SDR content. So if you want, 203 nits for SDR content, pass in > > > (203.0 / 80.0). > > > > > > > Is gamescope intending to use this? > > I don't think so. Again, I'll double check and drop it accordingly. > > Melissa > > > > > Harry > > > > > Co-developed-by: Melissa Wen <mwen@igalia.com> > > > Signed-off-by: Melissa Wen <mwen@igalia.com> > > > Signed-off-by: Joshua Ashton <joshua@froggi.es> > > > --- > > > drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ > > > drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ > > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ > > > .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- > > > 4 files changed, 41 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > > > index 24595906dab1..dd658f162f6f 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > > > @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) > > > return -ENOMEM; > > > adev->mode_info.plane_degamma_tf_property = prop; > > > > > > + prop = drm_property_create_range(adev_to_drm(adev), > > > + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); > > > + if (!prop) > > > + return -ENOMEM; > > > + adev->mode_info.plane_hdr_mult_property = prop; > > > + > > > return 0; > > > } > > > #endif > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > > > index ab9ce6f26c90..65a9d62ffbe4 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > > > @@ -387,6 +387,10 @@ struct amdgpu_mode_info { > > > * linearize content with or without LUT. > > > */ > > > struct drm_property *plane_degamma_tf_property; > > > + /** > > > + * @plane_hdr_mult_property: > > > + */ > > > + struct drm_property *plane_hdr_mult_property; > > > #endif > > > }; > > > > > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > > > index 005632c1c9ec..bb7307b9cfd5 100644 > > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > > > @@ -51,6 +51,7 @@ > > > > > > #define AMDGPU_DMUB_NOTIFICATION_MAX 5 > > > > > > +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) > > > /* > > > #include "include/amdgpu_dal_power_if.h" > > > #include "amdgpu_dm_irq.h" > > > @@ -736,6 +737,17 @@ struct dm_plane_state { > > > * linearize. > > > */ > > > enum drm_transfer_function degamma_tf; > > > + /** > > > + * @hdr_mult: > > > + * > > > + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed > > > + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on > > > + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. > > > + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you > > > + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is > > > + * S31.32 sign-magnitude. > > > + */ > > > + __u64 hdr_mult; > > > #endif > > > }; > > > > > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > > > index 5b458cc0781c..57169dae8b3d 100644 > > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > > > @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) > > > __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); > > > > > > #ifdef CONFIG_STEAM_DECK > > > - if (amdgpu_state) > > > + if (amdgpu_state) { > > > amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; > > > + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; > > > + } > > > #endif > > > } > > > > > > @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, > > > #ifdef CONFIG_STEAM_DECK > > > int > > > amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, > > > - struct drm_property_blob **blob, > > > - uint64_t blob_id, > > > - ssize_t expected_size, > > > - ssize_t expected_elem_size, > > > - bool *replaced) > > > + struct drm_property_blob **blob, > > > + uint64_t blob_id, > > > + ssize_t expected_size, > > > + ssize_t expected_elem_size, > > > + bool *replaced) > > > { > > > struct drm_property_blob *new_blob = NULL; > > > > > > @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, > > > dm->adev->mode_info.plane_degamma_tf_property, > > > DRM_TRANSFER_FUNCTION_DEFAULT); > > > } > > > + /* HDR MULT is always available */ > > > + drm_object_attach_property(&plane->base, > > > + dm->adev->mode_info.plane_hdr_mult_property, > > > + AMDGPU_HDR_MULT_DEFAULT); > > > } > > > > > > static int > > > @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, > > > dm_plane_state->degamma_tf = val; > > > dm_plane_state->base.color_mgmt_changed = 1; > > > } > > > + } else if (property == adev->mode_info.plane_hdr_mult_property) { > > > + if (dm_plane_state->hdr_mult != val) { > > > + dm_plane_state->hdr_mult = val; > > > + dm_plane_state->base.color_mgmt_changed = 1; > > > + } > > > } else { > > > drm_dbg_atomic(plane->dev, > > > "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", > > > @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, > > > dm_plane_state->degamma_lut->base.id : 0; > > > } else if (property == adev->mode_info.plane_degamma_tf_property) { > > > *val = dm_plane_state->degamma_tf; > > > + } else if (property == adev->mode_info.plane_hdr_mult_property) { > > > + *val = dm_plane_state->hdr_mult; > > > } else { > > > return -EINVAL; > > > } > > > >
On 5/9/23 12:54, Joshua Ashton wrote: > We currently do not have a use for this as we settled on per-plane 3D > LUT + Shaper, but we might end up wanting to use in our scRGB stack > someday so I would like to keep it. > uAPI should always have a userspace that uses it. But if we go and put it behind an #ifdef anyways I don't mind taking this if we foresee use for it in the near future. A gamescope experiment showing how this can be used to scale sRGB planes would be great. I assume that's sort of how you intend to use it. Harry > On Tue, 9 May 2023 at 16:37, Melissa Wen <mwen@igalia.com> wrote: >> >> On 05/08, Harry Wentland wrote: >>> >>> >>> On 4/23/23 10:10, Melissa Wen wrote: >>>> From: Joshua Ashton <joshua@froggi.es> >>>> >>>> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func >>>> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at >>>> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 >>>> nits for SDR content. So if you want, 203 nits for SDR content, pass in >>>> (203.0 / 80.0). >>>> >>> >>> Is gamescope intending to use this? >> >> I don't think so. Again, I'll double check and drop it accordingly. >> >> Melissa >> >>> >>> Harry >>> >>>> Co-developed-by: Melissa Wen <mwen@igalia.com> >>>> Signed-off-by: Melissa Wen <mwen@igalia.com> >>>> Signed-off-by: Joshua Ashton <joshua@froggi.es> >>>> --- >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ >>>> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ >>>> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- >>>> 4 files changed, 41 insertions(+), 6 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c >>>> index 24595906dab1..dd658f162f6f 100644 >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c >>>> @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) >>>> return -ENOMEM; >>>> adev->mode_info.plane_degamma_tf_property = prop; >>>> >>>> + prop = drm_property_create_range(adev_to_drm(adev), >>>> + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); >>>> + if (!prop) >>>> + return -ENOMEM; >>>> + adev->mode_info.plane_hdr_mult_property = prop; >>>> + >>>> return 0; >>>> } >>>> #endif >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h >>>> index ab9ce6f26c90..65a9d62ffbe4 100644 >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h >>>> @@ -387,6 +387,10 @@ struct amdgpu_mode_info { >>>> * linearize content with or without LUT. >>>> */ >>>> struct drm_property *plane_degamma_tf_property; >>>> + /** >>>> + * @plane_hdr_mult_property: >>>> + */ >>>> + struct drm_property *plane_hdr_mult_property; >>>> #endif >>>> }; >>>> >>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h >>>> index 005632c1c9ec..bb7307b9cfd5 100644 >>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h >>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h >>>> @@ -51,6 +51,7 @@ >>>> >>>> #define AMDGPU_DMUB_NOTIFICATION_MAX 5 >>>> >>>> +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) >>>> /* >>>> #include "include/amdgpu_dal_power_if.h" >>>> #include "amdgpu_dm_irq.h" >>>> @@ -736,6 +737,17 @@ struct dm_plane_state { >>>> * linearize. >>>> */ >>>> enum drm_transfer_function degamma_tf; >>>> + /** >>>> + * @hdr_mult: >>>> + * >>>> + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed >>>> + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on >>>> + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. >>>> + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you >>>> + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is >>>> + * S31.32 sign-magnitude. >>>> + */ >>>> + __u64 hdr_mult; >>>> #endif >>>> }; >>>> >>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >>>> index 5b458cc0781c..57169dae8b3d 100644 >>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >>>> @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) >>>> __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); >>>> >>>> #ifdef CONFIG_STEAM_DECK >>>> - if (amdgpu_state) >>>> + if (amdgpu_state) { >>>> amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; >>>> + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; >>>> + } >>>> #endif >>>> } >>>> >>>> @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, >>>> #ifdef CONFIG_STEAM_DECK >>>> int >>>> amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, >>>> - struct drm_property_blob **blob, >>>> - uint64_t blob_id, >>>> - ssize_t expected_size, >>>> - ssize_t expected_elem_size, >>>> - bool *replaced) >>>> + struct drm_property_blob **blob, >>>> + uint64_t blob_id, >>>> + ssize_t expected_size, >>>> + ssize_t expected_elem_size, >>>> + bool *replaced) >>>> { >>>> struct drm_property_blob *new_blob = NULL; >>>> >>>> @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, >>>> dm->adev->mode_info.plane_degamma_tf_property, >>>> DRM_TRANSFER_FUNCTION_DEFAULT); >>>> } >>>> + /* HDR MULT is always available */ >>>> + drm_object_attach_property(&plane->base, >>>> + dm->adev->mode_info.plane_hdr_mult_property, >>>> + AMDGPU_HDR_MULT_DEFAULT); >>>> } >>>> >>>> static int >>>> @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, >>>> dm_plane_state->degamma_tf = val; >>>> dm_plane_state->base.color_mgmt_changed = 1; >>>> } >>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) { >>>> + if (dm_plane_state->hdr_mult != val) { >>>> + dm_plane_state->hdr_mult = val; >>>> + dm_plane_state->base.color_mgmt_changed = 1; >>>> + } >>>> } else { >>>> drm_dbg_atomic(plane->dev, >>>> "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", >>>> @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, >>>> dm_plane_state->degamma_lut->base.id : 0; >>>> } else if (property == adev->mode_info.plane_degamma_tf_property) { >>>> *val = dm_plane_state->degamma_tf; >>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) { >>>> + *val = dm_plane_state->hdr_mult; >>>> } else { >>>> return -EINVAL; >>>> } >>> >>>
FWIW, we technically do use it right now, but it is always set to 1 in S.31.32. Before we used shaper + 3D LUT we did use it for scaling SDR content, but given we always have a shaper + 3D LUT it made sense for us to roll that into there. On Tue, 9 May 2023 at 20:00, Harry Wentland <harry.wentland@amd.com> wrote: > > On 5/9/23 12:54, Joshua Ashton wrote: > > We currently do not have a use for this as we settled on per-plane 3D > > LUT + Shaper, but we might end up wanting to use in our scRGB stack > > someday so I would like to keep it. > > > > uAPI should always have a userspace that uses it. But if we go > and put it behind an #ifdef anyways I don't mind taking this > if we foresee use for it in the near future. A gamescope experiment > showing how this can be used to scale sRGB planes would be great. > I assume that's sort of how you intend to use it. > > Harry > > > On Tue, 9 May 2023 at 16:37, Melissa Wen <mwen@igalia.com> wrote: > >> > >> On 05/08, Harry Wentland wrote: > >>> > >>> > >>> On 4/23/23 10:10, Melissa Wen wrote: > >>>> From: Joshua Ashton <joshua@froggi.es> > >>>> > >>>> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func > >>>> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at > >>>> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 > >>>> nits for SDR content. So if you want, 203 nits for SDR content, pass in > >>>> (203.0 / 80.0). > >>>> > >>> > >>> Is gamescope intending to use this? > >> > >> I don't think so. Again, I'll double check and drop it accordingly. > >> > >> Melissa > >> > >>> > >>> Harry > >>> > >>>> Co-developed-by: Melissa Wen <mwen@igalia.com> > >>>> Signed-off-by: Melissa Wen <mwen@igalia.com> > >>>> Signed-off-by: Joshua Ashton <joshua@froggi.es> > >>>> --- > >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ > >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ > >>>> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ > >>>> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- > >>>> 4 files changed, 41 insertions(+), 6 deletions(-) > >>>> > >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > >>>> index 24595906dab1..dd658f162f6f 100644 > >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c > >>>> @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) > >>>> return -ENOMEM; > >>>> adev->mode_info.plane_degamma_tf_property = prop; > >>>> > >>>> + prop = drm_property_create_range(adev_to_drm(adev), > >>>> + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); > >>>> + if (!prop) > >>>> + return -ENOMEM; > >>>> + adev->mode_info.plane_hdr_mult_property = prop; > >>>> + > >>>> return 0; > >>>> } > >>>> #endif > >>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > >>>> index ab9ce6f26c90..65a9d62ffbe4 100644 > >>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > >>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h > >>>> @@ -387,6 +387,10 @@ struct amdgpu_mode_info { > >>>> * linearize content with or without LUT. > >>>> */ > >>>> struct drm_property *plane_degamma_tf_property; > >>>> + /** > >>>> + * @plane_hdr_mult_property: > >>>> + */ > >>>> + struct drm_property *plane_hdr_mult_property; > >>>> #endif > >>>> }; > >>>> > >>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > >>>> index 005632c1c9ec..bb7307b9cfd5 100644 > >>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > >>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h > >>>> @@ -51,6 +51,7 @@ > >>>> > >>>> #define AMDGPU_DMUB_NOTIFICATION_MAX 5 > >>>> > >>>> +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) > >>>> /* > >>>> #include "include/amdgpu_dal_power_if.h" > >>>> #include "amdgpu_dm_irq.h" > >>>> @@ -736,6 +737,17 @@ struct dm_plane_state { > >>>> * linearize. > >>>> */ > >>>> enum drm_transfer_function degamma_tf; > >>>> + /** > >>>> + * @hdr_mult: > >>>> + * > >>>> + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed > >>>> + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on > >>>> + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. > >>>> + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you > >>>> + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is > >>>> + * S31.32 sign-magnitude. > >>>> + */ > >>>> + __u64 hdr_mult; > >>>> #endif > >>>> }; > >>>> > >>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > >>>> index 5b458cc0781c..57169dae8b3d 100644 > >>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > >>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > >>>> @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) > >>>> __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); > >>>> > >>>> #ifdef CONFIG_STEAM_DECK > >>>> - if (amdgpu_state) > >>>> + if (amdgpu_state) { > >>>> amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; > >>>> + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; > >>>> + } > >>>> #endif > >>>> } > >>>> > >>>> @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, > >>>> #ifdef CONFIG_STEAM_DECK > >>>> int > >>>> amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, > >>>> - struct drm_property_blob **blob, > >>>> - uint64_t blob_id, > >>>> - ssize_t expected_size, > >>>> - ssize_t expected_elem_size, > >>>> - bool *replaced) > >>>> + struct drm_property_blob **blob, > >>>> + uint64_t blob_id, > >>>> + ssize_t expected_size, > >>>> + ssize_t expected_elem_size, > >>>> + bool *replaced) > >>>> { > >>>> struct drm_property_blob *new_blob = NULL; > >>>> > >>>> @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, > >>>> dm->adev->mode_info.plane_degamma_tf_property, > >>>> DRM_TRANSFER_FUNCTION_DEFAULT); > >>>> } > >>>> + /* HDR MULT is always available */ > >>>> + drm_object_attach_property(&plane->base, > >>>> + dm->adev->mode_info.plane_hdr_mult_property, > >>>> + AMDGPU_HDR_MULT_DEFAULT); > >>>> } > >>>> > >>>> static int > >>>> @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, > >>>> dm_plane_state->degamma_tf = val; > >>>> dm_plane_state->base.color_mgmt_changed = 1; > >>>> } > >>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) { > >>>> + if (dm_plane_state->hdr_mult != val) { > >>>> + dm_plane_state->hdr_mult = val; > >>>> + dm_plane_state->base.color_mgmt_changed = 1; > >>>> + } > >>>> } else { > >>>> drm_dbg_atomic(plane->dev, > >>>> "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", > >>>> @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, > >>>> dm_plane_state->degamma_lut->base.id : 0; > >>>> } else if (property == adev->mode_info.plane_degamma_tf_property) { > >>>> *val = dm_plane_state->degamma_tf; > >>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) { > >>>> + *val = dm_plane_state->hdr_mult; > >>>> } else { > >>>> return -EINVAL; > >>>> } > >>> > >>> >
On 5/9/23 16:35, Joshua Ashton wrote: > FWIW, we technically do use it right now, but it is always set to 1 in S.31.32. > > Before we used shaper + 3D LUT we did use it for scaling SDR content, > but given we always have a shaper + 3D LUT it made sense for us to > roll that into there. > Ah, that's good. No problem then. Harry > On Tue, 9 May 2023 at 20:00, Harry Wentland <harry.wentland@amd.com> wrote: >> >> On 5/9/23 12:54, Joshua Ashton wrote: >>> We currently do not have a use for this as we settled on per-plane 3D >>> LUT + Shaper, but we might end up wanting to use in our scRGB stack >>> someday so I would like to keep it. >>> >> >> uAPI should always have a userspace that uses it. But if we go >> and put it behind an #ifdef anyways I don't mind taking this >> if we foresee use for it in the near future. A gamescope experiment >> showing how this can be used to scale sRGB planes would be great. >> I assume that's sort of how you intend to use it. >> >> Harry >> >>> On Tue, 9 May 2023 at 16:37, Melissa Wen <mwen@igalia.com> wrote: >>>> >>>> On 05/08, Harry Wentland wrote: >>>>> >>>>> >>>>> On 4/23/23 10:10, Melissa Wen wrote: >>>>>> From: Joshua Ashton <joshua@froggi.es> >>>>>> >>>>>> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func >>>>>> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at >>>>>> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80 >>>>>> nits for SDR content. So if you want, 203 nits for SDR content, pass in >>>>>> (203.0 / 80.0). >>>>>> >>>>> >>>>> Is gamescope intending to use this? >>>> >>>> I don't think so. Again, I'll double check and drop it accordingly. >>>> >>>> Melissa >>>> >>>>> >>>>> Harry >>>>> >>>>>> Co-developed-by: Melissa Wen <mwen@igalia.com> >>>>>> Signed-off-by: Melissa Wen <mwen@igalia.com> >>>>>> Signed-off-by: Joshua Ashton <joshua@froggi.es> >>>>>> --- >>>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++ >>>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++ >>>>>> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++ >>>>>> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++----- >>>>>> 4 files changed, 41 insertions(+), 6 deletions(-) >>>>>> >>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c >>>>>> index 24595906dab1..dd658f162f6f 100644 >>>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c >>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c >>>>>> @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) >>>>>> return -ENOMEM; >>>>>> adev->mode_info.plane_degamma_tf_property = prop; >>>>>> >>>>>> + prop = drm_property_create_range(adev_to_drm(adev), >>>>>> + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); >>>>>> + if (!prop) >>>>>> + return -ENOMEM; >>>>>> + adev->mode_info.plane_hdr_mult_property = prop; >>>>>> + >>>>>> return 0; >>>>>> } >>>>>> #endif >>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h >>>>>> index ab9ce6f26c90..65a9d62ffbe4 100644 >>>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h >>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h >>>>>> @@ -387,6 +387,10 @@ struct amdgpu_mode_info { >>>>>> * linearize content with or without LUT. >>>>>> */ >>>>>> struct drm_property *plane_degamma_tf_property; >>>>>> + /** >>>>>> + * @plane_hdr_mult_property: >>>>>> + */ >>>>>> + struct drm_property *plane_hdr_mult_property; >>>>>> #endif >>>>>> }; >>>>>> >>>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h >>>>>> index 005632c1c9ec..bb7307b9cfd5 100644 >>>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h >>>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h >>>>>> @@ -51,6 +51,7 @@ >>>>>> >>>>>> #define AMDGPU_DMUB_NOTIFICATION_MAX 5 >>>>>> >>>>>> +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) >>>>>> /* >>>>>> #include "include/amdgpu_dal_power_if.h" >>>>>> #include "amdgpu_dm_irq.h" >>>>>> @@ -736,6 +737,17 @@ struct dm_plane_state { >>>>>> * linearize. >>>>>> */ >>>>>> enum drm_transfer_function degamma_tf; >>>>>> + /** >>>>>> + * @hdr_mult: >>>>>> + * >>>>>> + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed >>>>>> + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on >>>>>> + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. >>>>>> + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you >>>>>> + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is >>>>>> + * S31.32 sign-magnitude. >>>>>> + */ >>>>>> + __u64 hdr_mult; >>>>>> #endif >>>>>> }; >>>>>> >>>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >>>>>> index 5b458cc0781c..57169dae8b3d 100644 >>>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >>>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c >>>>>> @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) >>>>>> __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); >>>>>> >>>>>> #ifdef CONFIG_STEAM_DECK >>>>>> - if (amdgpu_state) >>>>>> + if (amdgpu_state) { >>>>>> amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; >>>>>> + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; >>>>>> + } >>>>>> #endif >>>>>> } >>>>>> >>>>>> @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, >>>>>> #ifdef CONFIG_STEAM_DECK >>>>>> int >>>>>> amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, >>>>>> - struct drm_property_blob **blob, >>>>>> - uint64_t blob_id, >>>>>> - ssize_t expected_size, >>>>>> - ssize_t expected_elem_size, >>>>>> - bool *replaced) >>>>>> + struct drm_property_blob **blob, >>>>>> + uint64_t blob_id, >>>>>> + ssize_t expected_size, >>>>>> + ssize_t expected_elem_size, >>>>>> + bool *replaced) >>>>>> { >>>>>> struct drm_property_blob *new_blob = NULL; >>>>>> >>>>>> @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, >>>>>> dm->adev->mode_info.plane_degamma_tf_property, >>>>>> DRM_TRANSFER_FUNCTION_DEFAULT); >>>>>> } >>>>>> + /* HDR MULT is always available */ >>>>>> + drm_object_attach_property(&plane->base, >>>>>> + dm->adev->mode_info.plane_hdr_mult_property, >>>>>> + AMDGPU_HDR_MULT_DEFAULT); >>>>>> } >>>>>> >>>>>> static int >>>>>> @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, >>>>>> dm_plane_state->degamma_tf = val; >>>>>> dm_plane_state->base.color_mgmt_changed = 1; >>>>>> } >>>>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) { >>>>>> + if (dm_plane_state->hdr_mult != val) { >>>>>> + dm_plane_state->hdr_mult = val; >>>>>> + dm_plane_state->base.color_mgmt_changed = 1; >>>>>> + } >>>>>> } else { >>>>>> drm_dbg_atomic(plane->dev, >>>>>> "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", >>>>>> @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, >>>>>> dm_plane_state->degamma_lut->base.id : 0; >>>>>> } else if (property == adev->mode_info.plane_degamma_tf_property) { >>>>>> *val = dm_plane_state->degamma_tf; >>>>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) { >>>>>> + *val = dm_plane_state->hdr_mult; >>>>>> } else { >>>>>> return -EINVAL; >>>>>> } >>>>> >>>>> >>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c index 24595906dab1..dd658f162f6f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev) return -ENOMEM; adev->mode_info.plane_degamma_tf_property = prop; + prop = drm_property_create_range(adev_to_drm(adev), + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + adev->mode_info.plane_hdr_mult_property = prop; + return 0; } #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h index ab9ce6f26c90..65a9d62ffbe4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h @@ -387,6 +387,10 @@ struct amdgpu_mode_info { * linearize content with or without LUT. */ struct drm_property *plane_degamma_tf_property; + /** + * @plane_hdr_mult_property: + */ + struct drm_property *plane_hdr_mult_property; #endif }; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 005632c1c9ec..bb7307b9cfd5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -51,6 +51,7 @@ #define AMDGPU_DMUB_NOTIFICATION_MAX 5 +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL) /* #include "include/amdgpu_dal_power_if.h" #include "amdgpu_dm_irq.h" @@ -736,6 +737,17 @@ struct dm_plane_state { * linearize. */ enum drm_transfer_function degamma_tf; + /** + * @hdr_mult: + * + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously. + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is + * S31.32 sign-magnitude. + */ + __u64 hdr_mult; #endif }; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 5b458cc0781c..57169dae8b3d 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane) __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); #ifdef CONFIG_STEAM_DECK - if (amdgpu_state) + if (amdgpu_state) { amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT; + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT; + } #endif } @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane, #ifdef CONFIG_STEAM_DECK int amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev, - struct drm_property_blob **blob, - uint64_t blob_id, - ssize_t expected_size, - ssize_t expected_elem_size, - bool *replaced) + struct drm_property_blob **blob, + uint64_t blob_id, + ssize_t expected_size, + ssize_t expected_elem_size, + bool *replaced) { struct drm_property_blob *new_blob = NULL; @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm, dm->adev->mode_info.plane_degamma_tf_property, DRM_TRANSFER_FUNCTION_DEFAULT); } + /* HDR MULT is always available */ + drm_object_attach_property(&plane->base, + dm->adev->mode_info.plane_hdr_mult_property, + AMDGPU_HDR_MULT_DEFAULT); } static int @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane, dm_plane_state->degamma_tf = val; dm_plane_state->base.color_mgmt_changed = 1; } + } else if (property == adev->mode_info.plane_hdr_mult_property) { + if (dm_plane_state->hdr_mult != val) { + dm_plane_state->hdr_mult = val; + dm_plane_state->base.color_mgmt_changed = 1; + } } else { drm_dbg_atomic(plane->dev, "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane, dm_plane_state->degamma_lut->base.id : 0; } else if (property == adev->mode_info.plane_degamma_tf_property) { *val = dm_plane_state->degamma_tf; + } else if (property == adev->mode_info.plane_hdr_mult_property) { + *val = dm_plane_state->hdr_mult; } else { return -EINVAL; }