Message ID | 20230427162301.1151333-4-patrick@rivosinc.com |
---|---|
State | Accepted |
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Thu, 27 Apr 2023 09:24:12 -0700 (PDT) From: Patrick O'Neill <patrick@rivosinc.com> To: gcc-patches@gcc.gnu.org Cc: palmer@rivosinc.com, gnu-toolchain@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, hboehm@google.com, jeffreyalaw@gmail.com, Patrick O'Neill <patrick@rivosinc.com> Subject: [PATCH v5 03/11] RISC-V: Enforce subword atomic LR/SC SEQ_CST Date: Thu, 27 Apr 2023 09:22:53 -0700 Message-Id: <20230427162301.1151333-4-patrick@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230427162301.1151333-1-patrick@rivosinc.com> References: <20230414170942.1695672-1-patrick@rivosinc.com> <20230427162301.1151333-1-patrick@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764347664640978684?= X-GMAIL-MSGID: =?utf-8?q?1764347664640978684?= |
Series |
RISC-V: Implement ISA Manual Table A.6 Mappings
|
|
Checks
Context | Check | Description |
---|---|---|
snail/gcc-patch-check | success | Github commit url |
Commit Message
Patrick O'Neill
April 27, 2023, 4:22 p.m. UTC
Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
gcc/ChangeLog:
* config/riscv/sync.md: Change LR.aq/SC.rl pairs into
sequentially consistent LR.aqrl/SC.rl pairs.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
v5 Changelog:
* Add this patch to address the added inline subword atomic sequences.
---
gcc/config/riscv/sync.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Comments
On 4/27/23 09:22, Patrick O'Neill wrote: > Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs > recommended by table A.6 of the ISA manual. > > 2023-04-27 Patrick O'Neill <patrick@rivosinc.com> > > gcc/ChangeLog: > > * config/riscv/sync.md: Change LR.aq/SC.rl pairs into > sequentially consistent LR.aqrl/SC.rl pairs. > > Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> Acked by Jeff Law in reply to [PATCH v5 02/11] https://inbox.sourceware.org/gcc-patches/ce2e7d52-046d-90d7-baa2-11b299d5034d@gmail.com/ Committed. Patrick
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 19274528262..0c83ef04607 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -109,7 +109,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "<insn>\t%5, %0, %2\;" "and\t%5, %5, %3\;" "and\t%6, %0, %4\;" @@ -173,7 +173,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%5, %0, %2\;" "not\t%5, %5\;" "and\t%5, %5, %3\;" @@ -278,7 +278,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%4, %0, %3\;" "or\t%4, %4, %2\;" "sc.w.rl\t%4, %4, %1\;" @@ -443,7 +443,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%6, %0, %4\;" "bne\t%6, %z2, 1f\;" "and\t%6, %0, %5\;"