[v2] mtd: rawnand: macronix: OTP access for MX30LFxG18AC
Commit Message
This adds support for OTP area access on MX30LFxG18AC chip series.
Changelog:
v1 -> v2:
* Add slab.h include due to kernel test robot error.
Signed-off-by: Arseniy Krasnov <AVKrasnov@sberdevices.ru>
---
drivers/mtd/nand/raw/nand_macronix.c | 213 +++++++++++++++++++++++++++
1 file changed, 213 insertions(+)
Comments
Hi Arseniy,
kernel test robot noticed the following build errors:
[auto build test ERROR on mtd/nand/next]
[also build test ERROR on linus/master v6.3 next-20230428]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Arseniy-Krasnov/mtd-rawnand-macronix-OTP-access-for-MX30LFxG18AC/20230427-013216
base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next
patch link: https://lore.kernel.org/r/20230426172520.2004711-1-AVKrasnov%40sberdevices.ru
patch subject: [PATCH v2] mtd: rawnand: macronix: OTP access for MX30LFxG18AC
config: sparc-randconfig-c042-20230430 (https://download.01.org/0day-ci/archive/20230501/202305010034.uh2F9KeO-lkp@intel.com/config)
compiler: sparc-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/923eca7325935e1120923aeca0177cc0acc61475
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Arseniy-Krasnov/mtd-rawnand-macronix-OTP-access-for-MX30LFxG18AC/20230427-013216
git checkout 923eca7325935e1120923aeca0177cc0acc61475
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sparc olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sparc SHELL=/bin/bash drivers/mtd/nand/raw/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202305010034.uh2F9KeO-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from ./arch/sparc/include/generated/asm/div64.h:1,
from include/linux/math.h:6,
from include/linux/math64.h:6,
from include/linux/time64.h:5,
from include/linux/restart_block.h:10,
from include/linux/thread_info.h:14,
from include/asm-generic/preempt.h:5,
from ./arch/sparc/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:78,
from include/linux/spinlock.h:56,
from include/linux/mmzone.h:8,
from include/linux/gfp.h:7,
from include/linux/slab.h:15,
from drivers/mtd/nand/raw/nand_macronix.c:9:
drivers/mtd/nand/raw/nand_macronix.c: In function '__macronix_30lfxg18ac_rw_otp':
include/asm-generic/div64.h:222:35: warning: comparison of distinct pointer types lacks a cast
222 | (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
| ^~
drivers/mtd/nand/raw/nand_macronix.c:398:24: note: in expansion of macro 'do_div'
398 | offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE);
| ^~~~~~
In file included from include/linux/build_bug.h:5,
from include/linux/container_of.h:5,
from include/linux/list.h:5,
from include/linux/preempt.h:11:
include/asm-generic/div64.h:234:32: warning: right shift count >= width of type [-Wshift-count-overflow]
234 | } else if (likely(((n) >> 32) == 0)) { \
| ^~
include/linux/compiler.h:77:45: note: in definition of macro 'likely'
77 | # define likely(x) __builtin_expect(!!(x), 1)
| ^
drivers/mtd/nand/raw/nand_macronix.c:398:24: note: in expansion of macro 'do_div'
398 | offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE);
| ^~~~~~
>> include/asm-generic/div64.h:238:36: error: passing argument 1 of '__div64_32' from incompatible pointer type [-Werror=incompatible-pointer-types]
238 | __rem = __div64_32(&(n), __base); \
| ^~~~
| |
| long unsigned int *
drivers/mtd/nand/raw/nand_macronix.c:398:24: note: in expansion of macro 'do_div'
398 | offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE);
| ^~~~~~
include/asm-generic/div64.h:213:38: note: expected 'uint64_t *' {aka 'long long unsigned int *'} but argument is of type 'long unsigned int *'
213 | extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
| ~~~~~~~~~~^~~~~~~~
cc1: some warnings being treated as errors
vim +/__div64_32 +238 include/asm-generic/div64.h
^1da177e4c3f415 Linus Torvalds 2005-04-16 215
^1da177e4c3f415 Linus Torvalds 2005-04-16 216 /* The unnecessary pointer compare is there
^1da177e4c3f415 Linus Torvalds 2005-04-16 217 * to check for type safety (n must be 64bit)
^1da177e4c3f415 Linus Torvalds 2005-04-16 218 */
^1da177e4c3f415 Linus Torvalds 2005-04-16 219 # define do_div(n,base) ({ \
^1da177e4c3f415 Linus Torvalds 2005-04-16 220 uint32_t __base = (base); \
^1da177e4c3f415 Linus Torvalds 2005-04-16 221 uint32_t __rem; \
^1da177e4c3f415 Linus Torvalds 2005-04-16 222 (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
911918aa7ef6f86 Nicolas Pitre 2015-11-02 223 if (__builtin_constant_p(__base) && \
911918aa7ef6f86 Nicolas Pitre 2015-11-02 224 is_power_of_2(__base)) { \
911918aa7ef6f86 Nicolas Pitre 2015-11-02 225 __rem = (n) & (__base - 1); \
911918aa7ef6f86 Nicolas Pitre 2015-11-02 226 (n) >>= ilog2(__base); \
c747ce4706190ef Geert Uytterhoeven 2021-08-11 227 } else if (__builtin_constant_p(__base) && \
461a5e51060c93f Nicolas Pitre 2015-10-30 228 __base != 0) { \
461a5e51060c93f Nicolas Pitre 2015-10-30 229 uint32_t __res_lo, __n_lo = (n); \
461a5e51060c93f Nicolas Pitre 2015-10-30 230 (n) = __div64_const32(n, __base); \
461a5e51060c93f Nicolas Pitre 2015-10-30 231 /* the remainder can be computed with 32-bit regs */ \
461a5e51060c93f Nicolas Pitre 2015-10-30 232 __res_lo = (n); \
461a5e51060c93f Nicolas Pitre 2015-10-30 233 __rem = __n_lo - __res_lo * __base; \
911918aa7ef6f86 Nicolas Pitre 2015-11-02 @234 } else if (likely(((n) >> 32) == 0)) { \
^1da177e4c3f415 Linus Torvalds 2005-04-16 235 __rem = (uint32_t)(n) % __base; \
^1da177e4c3f415 Linus Torvalds 2005-04-16 236 (n) = (uint32_t)(n) / __base; \
c747ce4706190ef Geert Uytterhoeven 2021-08-11 237 } else { \
^1da177e4c3f415 Linus Torvalds 2005-04-16 @238 __rem = __div64_32(&(n), __base); \
c747ce4706190ef Geert Uytterhoeven 2021-08-11 239 } \
^1da177e4c3f415 Linus Torvalds 2005-04-16 240 __rem; \
^1da177e4c3f415 Linus Torvalds 2005-04-16 241 })
^1da177e4c3f415 Linus Torvalds 2005-04-16 242
@@ -6,6 +6,7 @@
* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
*/
+#include <linux/slab.h>
#include "linux/delay.h"
#include "internals.h"
@@ -31,6 +32,20 @@
#define MXIC_CMD_POWER_DOWN 0xB9
+#define ONFI_FEATURE_ADDR_30LFXG18AC_OTP 0x90
+#define MACRONIX_30LFXG18AC_OTP_START_PAGE 0
+#define MACRONIX_30LFXG18AC_OTP_PAGES 30
+#define MACRONIX_30LFXG18AC_OTP_PAGE_SIZE 2112
+#define MACRONIX_30LFXG18AC_OTP_START_BYTE \
+ (MACRONIX_30LFXG18AC_OTP_START_PAGE * \
+ MACRONIX_30LFXG18AC_OTP_PAGE_SIZE)
+#define MACRONIX_30LFXG18AC_OTP_SIZE_BYTES \
+ (MACRONIX_30LFXG18AC_OTP_PAGES * \
+ MACRONIX_30LFXG18AC_OTP_PAGE_SIZE)
+
+#define MACRONIX_30LFXG18AC_OTP_EN BIT(0)
+#define MACRONIX_30LFXG18AC_OTP_LOCKED BIT(1)
+
struct nand_onfi_vendor_macronix {
u8 reserved;
u8 reliability_func;
@@ -316,6 +331,203 @@ static void macronix_nand_deep_power_down_support(struct nand_chip *chip)
chip->ops.resume = mxic_nand_resume;
}
+static int macronix_30lfxg18ac_get_otp_info(struct mtd_info *mtd, size_t len,
+ size_t *retlen,
+ struct otp_info *buf)
+{
+ if (len < sizeof(*buf))
+ return -EINVAL;
+
+ /* Don't know how to check that OTP is locked. */
+ buf->locked = 0;
+ buf->start = MACRONIX_30LFXG18AC_OTP_START_BYTE;
+ buf->length = MACRONIX_30LFXG18AC_OTP_SIZE_BYTES;
+
+ *retlen = sizeof(*buf);
+
+ return 0;
+}
+
+static int macronix_30lfxg18ac_otp_enable(struct nand_chip *nand)
+{
+ uint8_t feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
+
+ feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN;
+ return nand_set_features(nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP,
+ feature_buf);
+}
+
+static int macronix_30lfxg18ac_otp_disable(struct nand_chip *nand)
+{
+ uint8_t feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
+
+ return nand_set_features(nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP,
+ feature_buf);
+}
+
+static int __macronix_30lfxg18ac_rw_otp(struct mtd_info *mtd,
+ loff_t offs_in_flash,
+ size_t len, size_t *retlen,
+ u_char *buf, bool write)
+{
+ struct nand_chip *nand;
+ size_t bytes_handled;
+ unsigned long page;
+ off_t offs_in_page;
+ void *dma_buf;
+ int ret;
+
+ /* 'nand_prog/read_page_op()' may use 'buf' as DMA buffer,
+ * so allocate properly aligned memory for it. This is
+ * needed because cross page accesses may lead to unaligned
+ * buffer address for DMA.
+ */
+ dma_buf = kmalloc(MACRONIX_30LFXG18AC_OTP_PAGE_SIZE, GFP_KERNEL);
+ if (!dma_buf)
+ return -ENOMEM;
+
+ nand = mtd_to_nand(mtd);
+ nand_select_target(nand, 0);
+
+ ret = macronix_30lfxg18ac_otp_enable(nand);
+ if (ret)
+ goto out_otp;
+
+ page = offs_in_flash;
+ /* 'page' will be result of division. */
+ offs_in_page = do_div(page, MACRONIX_30LFXG18AC_OTP_PAGE_SIZE);
+ bytes_handled = 0;
+
+ while (bytes_handled < len &&
+ page < MACRONIX_30LFXG18AC_OTP_PAGES) {
+ size_t bytes_to_handle;
+
+ bytes_to_handle = min_t(size_t, len - bytes_handled,
+ MACRONIX_30LFXG18AC_OTP_PAGE_SIZE -
+ offs_in_page);
+
+ if (write) {
+ memcpy(dma_buf, &buf[bytes_handled], bytes_to_handle);
+ ret = nand_prog_page_op(nand, page, offs_in_page,
+ dma_buf, bytes_to_handle);
+ } else {
+ ret = nand_read_page_op(nand, page, offs_in_page,
+ dma_buf, bytes_to_handle);
+ if (!ret)
+ memcpy(&buf[bytes_handled], dma_buf,
+ bytes_to_handle);
+ }
+ if (ret)
+ goto out_otp;
+
+ bytes_handled += bytes_to_handle;
+ offs_in_page = 0;
+ page++;
+ }
+
+ *retlen = bytes_handled;
+
+out_otp:
+ if (ret)
+ dev_err(&mtd->dev, "failed to perform OTP IO: %i\n", ret);
+
+ ret = macronix_30lfxg18ac_otp_disable(nand);
+ WARN(ret, "failed to leave OTP mode after %s\n",
+ write ? "write" : "read");
+ nand_deselect_target(nand);
+ kfree(dma_buf);
+
+ return ret;
+}
+
+static int macronix_30lfxg18ac_write_otp(struct mtd_info *mtd, loff_t to,
+ size_t len, size_t *rlen,
+ const u_char *buf)
+{
+ return __macronix_30lfxg18ac_rw_otp(mtd, to, len, rlen, (u_char *)buf,
+ true);
+}
+
+static int macronix_30lfxg18ac_read_otp(struct mtd_info *mtd, loff_t from,
+ size_t len, size_t *rlen,
+ u_char *buf)
+{
+ return __macronix_30lfxg18ac_rw_otp(mtd, from, len, rlen, buf, false);
+}
+
+static int macronix_30lfxg18ac_lock_otp(struct mtd_info *mtd, loff_t from,
+ size_t len)
+{
+ uint8_t feature_buf[ONFI_SUBFEATURE_PARAM_LEN] = { 0 };
+ struct nand_chip *nand;
+ int ret;
+
+ if (from != MACRONIX_30LFXG18AC_OTP_START_BYTE ||
+ len != MACRONIX_30LFXG18AC_OTP_SIZE_BYTES)
+ return -EINVAL;
+
+ dev_dbg(&mtd->dev, "locking OTP\n");
+
+ nand = mtd_to_nand(mtd);
+ nand_select_target(nand, 0);
+
+ feature_buf[0] = MACRONIX_30LFXG18AC_OTP_EN |
+ MACRONIX_30LFXG18AC_OTP_LOCKED;
+ ret = nand_set_features(nand, ONFI_FEATURE_ADDR_30LFXG18AC_OTP,
+ feature_buf);
+ if (ret) {
+ dev_err(&mtd->dev,
+ "failed to lock OTP (set features): %i\n", ret);
+ nand_deselect_target(nand);
+ return ret;
+ }
+
+ /* Do dummy page prog with zero address. */
+ feature_buf[0] = 0;
+ ret = nand_prog_page_op(nand, 0, 0, feature_buf, 1);
+ if (ret)
+ dev_err(&mtd->dev,
+ "failed to lock OTP (page prog): %i\n", ret);
+
+ ret = macronix_30lfxg18ac_otp_disable(nand);
+ WARN(ret, "failed to leave OTP mode after lock\n");
+
+ nand_deselect_target(nand);
+
+ return ret;
+}
+
+static void macronix_nand_setup_otp(struct nand_chip *chip)
+{
+ static const char * const supported_otp_models[] = {
+ "MX30LF1G18AC",
+ "MX30LF2G18AC",
+ "MX30LF4G18AC",
+ };
+ struct mtd_info *mtd;
+
+ if (!chip->parameters.supports_set_get_features)
+ return;
+
+ if (match_string(supported_otp_models,
+ ARRAY_SIZE(supported_otp_models),
+ chip->parameters.model) < 0)
+ return;
+
+ bitmap_set(chip->parameters.get_feature_list,
+ ONFI_FEATURE_ADDR_30LFXG18AC_OTP, 1);
+ bitmap_set(chip->parameters.set_feature_list,
+ ONFI_FEATURE_ADDR_30LFXG18AC_OTP, 1);
+
+ mtd = nand_to_mtd(chip);
+ mtd->_get_fact_prot_info = macronix_30lfxg18ac_get_otp_info;
+ mtd->_read_fact_prot_reg = macronix_30lfxg18ac_read_otp;
+ mtd->_get_user_prot_info = macronix_30lfxg18ac_get_otp_info;
+ mtd->_read_user_prot_reg = macronix_30lfxg18ac_read_otp;
+ mtd->_write_user_prot_reg = macronix_30lfxg18ac_write_otp;
+ mtd->_lock_user_prot_reg = macronix_30lfxg18ac_lock_otp;
+}
+
static int macronix_nand_init(struct nand_chip *chip)
{
if (nand_is_slc(chip))
@@ -325,6 +537,7 @@ static int macronix_nand_init(struct nand_chip *chip)
macronix_nand_onfi_init(chip);
macronix_nand_block_protection_support(chip);
macronix_nand_deep_power_down_support(chip);
+ macronix_nand_setup_otp(chip);
return 0;
}