| Message ID | 20221029053429.38381-1-gwan-gyeong.mun@intel.com |
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From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
To: ndesaulniers@google.com
Cc: peterz@infradead.org, llvm@lists.linux.dev,
ashutosh.dixit@intel.com, andi.shyti@linux.intel.com,
linux-kernel@vger.kernel.org
Subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield
access macros
Date: Sat, 29 Oct 2022 08:34:29 +0300
Message-Id: <20221029053429.38381-1-gwan-gyeong.mun@intel.com>
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|
| Series |
bitfield: Use argument type for size comparison on Bitfield access macros
|
|
Commit Message
Gwan-gyeong Mun
Oct. 29, 2022, 5:34 a.m. UTC
Fix the size comparison code that implicitly assumes that the mask argument
of bitfield access macros is an unsigned long long type.
If unsigned int type is used for mask, the first argument of Bitfield
access macros, and clang is used to compile, this [1] option causes a build
error.[2]
[1] [-Werror,-Wtautological-constant-out-of-range-compare]
[2] https://lore.kernel.org/intel-gfx/c1c548f8-71a8-0d4d-d591-58a0cd5dac20@intel.com
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: llvm@lists.linux.dev
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
include/linux/bitfield.h | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
Comments
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc2 next-20221028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: arc-randconfig-r031-20221029
compiler: arceb-elf-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arc SHELL=/bin/bash drivers/iio/dac/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from <command-line>:
drivers/iio/dac/ad7293.c: In function 'ad7293_adc_get_scale':
>> include/linux/compiler_types.h:357:45: warning: macro expands to multiple statements [-Wmultistatement-macros]
357 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:338:25: note: in definition of macro '__compiletime_assert'
338 | prefix ## suffix(); \
| ^~~~~~
include/linux/compiler_types.h:357:9: note: in expansion of macro '_compiletime_assert'
357 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:72:17: note: in expansion of macro 'BUILD_BUG_ON_MSG'
72 | BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:122:17: note: in expansion of macro '__BF_FIELD_CHECK'
122 | __BF_FIELD_CHECK(_mask, \
| ^~~~~~~~~~~~~~~~
drivers/iio/dac/ad7293.c:24:49: note: in expansion of macro 'FIELD_PREP'
24 | #define AD7293_PAGE(x) FIELD_PREP(AD7293_PAGE_ADDR_MSK, x)
| ^~~~~~~~~~
drivers/iio/dac/ad7293.c:61:63: note: in expansion of macro 'AD7293_PAGE'
61 | #define AD7293_REG_VINX_RANGE0 (AD7293_R2B | AD7293_PAGE(0x2) | 0x15)
| ^~~~~~~~~~~
drivers/iio/dac/ad7293.c:288:37: note: in expansion of macro 'AD7293_REG_VINX_RANGE0'
288 | ret = __ad7293_spi_read(st, AD7293_REG_VINX_RANGE0, &data);
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from include/linux/build_bug.h:5,
from include/linux/bitfield.h:10,
from drivers/iio/dac/ad7293.c:8:
include/linux/compiler.h:56:23: note: some parts of macro expansion are not guarded by this 'if' clause
56 | #define if(cond, ...) if ( __trace_if_var( !!(cond , ## __VA_ARGS__) ) )
| ^~
vim +357 include/linux/compiler_types.h
eb5c2d4b45e3d2 Will Deacon 2020-07-21 343
eb5c2d4b45e3d2 Will Deacon 2020-07-21 344 #define _compiletime_assert(condition, msg, prefix, suffix) \
eb5c2d4b45e3d2 Will Deacon 2020-07-21 345 __compiletime_assert(condition, msg, prefix, suffix)
eb5c2d4b45e3d2 Will Deacon 2020-07-21 346
eb5c2d4b45e3d2 Will Deacon 2020-07-21 347 /**
eb5c2d4b45e3d2 Will Deacon 2020-07-21 348 * compiletime_assert - break build and emit msg if condition is false
eb5c2d4b45e3d2 Will Deacon 2020-07-21 349 * @condition: a compile-time constant condition to check
eb5c2d4b45e3d2 Will Deacon 2020-07-21 350 * @msg: a message to emit if condition is false
eb5c2d4b45e3d2 Will Deacon 2020-07-21 351 *
eb5c2d4b45e3d2 Will Deacon 2020-07-21 352 * In tradition of POSIX assert, this macro will break the build if the
eb5c2d4b45e3d2 Will Deacon 2020-07-21 353 * supplied condition is *false*, emitting the supplied error message if the
eb5c2d4b45e3d2 Will Deacon 2020-07-21 354 * compiler has support to do so.
eb5c2d4b45e3d2 Will Deacon 2020-07-21 355 */
eb5c2d4b45e3d2 Will Deacon 2020-07-21 356 #define compiletime_assert(condition, msg) \
eb5c2d4b45e3d2 Will Deacon 2020-07-21 @357 _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
eb5c2d4b45e3d2 Will Deacon 2020-07-21 358
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc2 next-20221028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: s390-randconfig-s042-20221029
compiler: s390-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=s390 SHELL=/bin/bash drivers/iio/accel/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/iio/accel/bma400_core.c:1654:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/bma400_core.c:1660:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/bma400_core.c:1668:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/bma400_core.c:1676:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/bma400_core.c:1679:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/bma400_core.c:1690:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/bma400_core.c:1712:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
vim +1654 drivers/iio/accel/bma400_core.c
ffe0ab6a96988d Jagath Jog J 2022-05-05 1629
ffe0ab6a96988d Jagath Jog J 2022-05-05 1630 static irqreturn_t bma400_interrupt(int irq, void *private)
ffe0ab6a96988d Jagath Jog J 2022-05-05 1631 {
ffe0ab6a96988d Jagath Jog J 2022-05-05 1632 struct iio_dev *indio_dev = private;
ffe0ab6a96988d Jagath Jog J 2022-05-05 1633 struct bma400_data *data = iio_priv(indio_dev);
d024af5b3970b9 Jagath Jog J 2022-05-05 1634 s64 timestamp = iio_get_time_ns(indio_dev);
3cf122c20bf835 Jagath Jog J 2022-05-05 1635 unsigned int act, ev_dir = IIO_EV_DIR_NONE;
ffe0ab6a96988d Jagath Jog J 2022-05-05 1636 int ret;
ffe0ab6a96988d Jagath Jog J 2022-05-05 1637
ffe0ab6a96988d Jagath Jog J 2022-05-05 1638 /* Lock to protect the data->status */
ffe0ab6a96988d Jagath Jog J 2022-05-05 1639 mutex_lock(&data->mutex);
ffe0ab6a96988d Jagath Jog J 2022-05-05 1640 ret = regmap_bulk_read(data->regmap, BMA400_INT_STAT0_REG,
ffe0ab6a96988d Jagath Jog J 2022-05-05 1641 &data->status,
ffe0ab6a96988d Jagath Jog J 2022-05-05 1642 sizeof(data->status));
ffe0ab6a96988d Jagath Jog J 2022-05-05 1643 /*
ffe0ab6a96988d Jagath Jog J 2022-05-05 1644 * if none of the bit is set in the status register then it is
ffe0ab6a96988d Jagath Jog J 2022-05-05 1645 * spurious interrupt.
ffe0ab6a96988d Jagath Jog J 2022-05-05 1646 */
ffe0ab6a96988d Jagath Jog J 2022-05-05 1647 if (ret || !data->status)
ffe0ab6a96988d Jagath Jog J 2022-05-05 1648 goto unlock_err;
ffe0ab6a96988d Jagath Jog J 2022-05-05 1649
961db2da159d51 Jagath Jog J 2022-08-31 1650 /*
961db2da159d51 Jagath Jog J 2022-08-31 1651 * Disable all advance interrupts if interrupt engine overrun occurs.
961db2da159d51 Jagath Jog J 2022-08-31 1652 * See section 4.7 "Interrupt engine overrun" in datasheet v1.2.
961db2da159d51 Jagath Jog J 2022-08-31 1653 */
961db2da159d51 Jagath Jog J 2022-08-31 @1654 if (FIELD_GET(BMA400_INT_ENG_OVRUN_MSK, le16_to_cpu(data->status))) {
961db2da159d51 Jagath Jog J 2022-08-31 1655 bma400_disable_adv_interrupt(data);
961db2da159d51 Jagath Jog J 2022-08-31 1656 dev_err(data->dev, "Interrupt engine overrun\n");
961db2da159d51 Jagath Jog J 2022-08-31 1657 goto unlock_err;
961db2da159d51 Jagath Jog J 2022-08-31 1658 }
961db2da159d51 Jagath Jog J 2022-08-31 1659
961db2da159d51 Jagath Jog J 2022-08-31 1660 if (FIELD_GET(BMA400_INT_S_TAP_MSK, le16_to_cpu(data->status)))
961db2da159d51 Jagath Jog J 2022-08-31 1661 iio_push_event(indio_dev,
961db2da159d51 Jagath Jog J 2022-08-31 1662 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
961db2da159d51 Jagath Jog J 2022-08-31 1663 IIO_MOD_X_OR_Y_OR_Z,
961db2da159d51 Jagath Jog J 2022-08-31 1664 IIO_EV_TYPE_GESTURE,
961db2da159d51 Jagath Jog J 2022-08-31 1665 IIO_EV_DIR_SINGLETAP),
961db2da159d51 Jagath Jog J 2022-08-31 1666 timestamp);
961db2da159d51 Jagath Jog J 2022-08-31 1667
961db2da159d51 Jagath Jog J 2022-08-31 1668 if (FIELD_GET(BMA400_INT_D_TAP_MSK, le16_to_cpu(data->status)))
961db2da159d51 Jagath Jog J 2022-08-31 1669 iio_push_event(indio_dev,
961db2da159d51 Jagath Jog J 2022-08-31 1670 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
961db2da159d51 Jagath Jog J 2022-08-31 1671 IIO_MOD_X_OR_Y_OR_Z,
961db2da159d51 Jagath Jog J 2022-08-31 1672 IIO_EV_TYPE_GESTURE,
961db2da159d51 Jagath Jog J 2022-08-31 1673 IIO_EV_DIR_DOUBLETAP),
961db2da159d51 Jagath Jog J 2022-08-31 1674 timestamp);
961db2da159d51 Jagath Jog J 2022-08-31 1675
3cf122c20bf835 Jagath Jog J 2022-05-05 1676 if (FIELD_GET(BMA400_INT_GEN1_MSK, le16_to_cpu(data->status)))
3cf122c20bf835 Jagath Jog J 2022-05-05 1677 ev_dir = IIO_EV_DIR_RISING;
3cf122c20bf835 Jagath Jog J 2022-05-05 1678
3cf122c20bf835 Jagath Jog J 2022-05-05 1679 if (FIELD_GET(BMA400_INT_GEN2_MSK, le16_to_cpu(data->status)))
3cf122c20bf835 Jagath Jog J 2022-05-05 1680 ev_dir = IIO_EV_DIR_FALLING;
3cf122c20bf835 Jagath Jog J 2022-05-05 1681
3cf122c20bf835 Jagath Jog J 2022-05-05 1682 if (ev_dir != IIO_EV_DIR_NONE) {
3cf122c20bf835 Jagath Jog J 2022-05-05 1683 iio_push_event(indio_dev,
3cf122c20bf835 Jagath Jog J 2022-05-05 1684 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
3cf122c20bf835 Jagath Jog J 2022-05-05 1685 IIO_MOD_X_OR_Y_OR_Z,
3cf122c20bf835 Jagath Jog J 2022-05-05 1686 IIO_EV_TYPE_MAG, ev_dir),
3cf122c20bf835 Jagath Jog J 2022-05-05 1687 timestamp);
3cf122c20bf835 Jagath Jog J 2022-05-05 1688 }
3cf122c20bf835 Jagath Jog J 2022-05-05 1689
d024af5b3970b9 Jagath Jog J 2022-05-05 1690 if (FIELD_GET(BMA400_STEP_STAT_MASK, le16_to_cpu(data->status))) {
d024af5b3970b9 Jagath Jog J 2022-05-05 1691 iio_push_event(indio_dev,
d024af5b3970b9 Jagath Jog J 2022-05-05 1692 IIO_MOD_EVENT_CODE(IIO_STEPS, 0, IIO_NO_MOD,
d024af5b3970b9 Jagath Jog J 2022-05-05 1693 IIO_EV_TYPE_CHANGE,
d024af5b3970b9 Jagath Jog J 2022-05-05 1694 IIO_EV_DIR_NONE),
d024af5b3970b9 Jagath Jog J 2022-05-05 1695 timestamp);
00ee658ff58177 Jagath Jog J 2022-05-05 1696
00ee658ff58177 Jagath Jog J 2022-05-05 1697 if (data->activity_event_en) {
00ee658ff58177 Jagath Jog J 2022-05-05 1698 ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
00ee658ff58177 Jagath Jog J 2022-05-05 1699 &act);
00ee658ff58177 Jagath Jog J 2022-05-05 1700 if (ret)
00ee658ff58177 Jagath Jog J 2022-05-05 1701 goto unlock_err;
00ee658ff58177 Jagath Jog J 2022-05-05 1702
00ee658ff58177 Jagath Jog J 2022-05-05 1703 iio_push_event(indio_dev,
00ee658ff58177 Jagath Jog J 2022-05-05 1704 IIO_MOD_EVENT_CODE(IIO_ACTIVITY, 0,
00ee658ff58177 Jagath Jog J 2022-05-05 1705 bma400_act_to_mod(act),
00ee658ff58177 Jagath Jog J 2022-05-05 1706 IIO_EV_TYPE_CHANGE,
00ee658ff58177 Jagath Jog J 2022-05-05 1707 IIO_EV_DIR_NONE),
00ee658ff58177 Jagath Jog J 2022-05-05 1708 timestamp);
00ee658ff58177 Jagath Jog J 2022-05-05 1709 }
d024af5b3970b9 Jagath Jog J 2022-05-05 1710 }
d024af5b3970b9 Jagath Jog J 2022-05-05 1711
ffe0ab6a96988d Jagath Jog J 2022-05-05 1712 if (FIELD_GET(BMA400_INT_DRDY_MSK, le16_to_cpu(data->status))) {
ffe0ab6a96988d Jagath Jog J 2022-05-05 1713 mutex_unlock(&data->mutex);
ffe0ab6a96988d Jagath Jog J 2022-05-05 1714 iio_trigger_poll_chained(data->trig);
ffe0ab6a96988d Jagath Jog J 2022-05-05 1715 return IRQ_HANDLED;
ffe0ab6a96988d Jagath Jog J 2022-05-05 1716 }
ffe0ab6a96988d Jagath Jog J 2022-05-05 1717
d024af5b3970b9 Jagath Jog J 2022-05-05 1718 mutex_unlock(&data->mutex);
d024af5b3970b9 Jagath Jog J 2022-05-05 1719 return IRQ_HANDLED;
d024af5b3970b9 Jagath Jog J 2022-05-05 1720
ffe0ab6a96988d Jagath Jog J 2022-05-05 1721 unlock_err:
ffe0ab6a96988d Jagath Jog J 2022-05-05 1722 mutex_unlock(&data->mutex);
ffe0ab6a96988d Jagath Jog J 2022-05-05 1723 return IRQ_NONE;
ffe0ab6a96988d Jagath Jog J 2022-05-05 1724 }
ffe0ab6a96988d Jagath Jog J 2022-05-05 1725
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc2 next-20221028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: arm64-randconfig-s032-20221028
compiler: aarch64-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm64 SHELL=/bin/bash arch/arm64/mm/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> arch/arm64/mm/extable.c:22:23: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
arch/arm64/mm/extable.c:23:24: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
arch/arm64/mm/extable.c:36:24: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
arch/arm64/mm/extable.c:37:24: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
vim +22 arch/arm64/mm/extable.c
d6e2cc56477538 Mark Rutland 2021-10-19 18
2e77a62cb3a6d2 Mark Rutland 2021-10-19 19 static bool ex_handler_uaccess_err_zero(const struct exception_table_entry *ex,
2e77a62cb3a6d2 Mark Rutland 2021-10-19 20 struct pt_regs *regs)
2e77a62cb3a6d2 Mark Rutland 2021-10-19 21 {
2e77a62cb3a6d2 Mark Rutland 2021-10-19 @22 int reg_err = FIELD_GET(EX_DATA_REG_ERR, ex->data);
2e77a62cb3a6d2 Mark Rutland 2021-10-19 23 int reg_zero = FIELD_GET(EX_DATA_REG_ZERO, ex->data);
2e77a62cb3a6d2 Mark Rutland 2021-10-19 24
2e77a62cb3a6d2 Mark Rutland 2021-10-19 25 pt_regs_write_reg(regs, reg_err, -EFAULT);
2e77a62cb3a6d2 Mark Rutland 2021-10-19 26 pt_regs_write_reg(regs, reg_zero, 0);
2e77a62cb3a6d2 Mark Rutland 2021-10-19 27
2e77a62cb3a6d2 Mark Rutland 2021-10-19 28 regs->pc = get_ex_fixup(ex);
2e77a62cb3a6d2 Mark Rutland 2021-10-19 29 return true;
2e77a62cb3a6d2 Mark Rutland 2021-10-19 30 }
2e77a62cb3a6d2 Mark Rutland 2021-10-19 31
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc2 next-20221028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: i386-randconfig-s001
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=i386 SHELL=/bin/bash drivers/iio/accel/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/iio/accel/adxl372.c:341:46: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/accel/adxl372.c:346:34: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
vim +341 drivers/iio/accel/adxl372.c
b0fc6783d4ae58 Stefan Popa 2020-08-10 333
b0fc6783d4ae58 Stefan Popa 2020-08-10 334 static ssize_t adxl372_write_threshold_value(struct iio_dev *indio_dev, unsigned int addr,
b0fc6783d4ae58 Stefan Popa 2020-08-10 335 u16 threshold)
b0fc6783d4ae58 Stefan Popa 2020-08-10 336 {
b0fc6783d4ae58 Stefan Popa 2020-08-10 337 struct adxl372_state *st = iio_priv(indio_dev);
b0fc6783d4ae58 Stefan Popa 2020-08-10 338 int ret;
b0fc6783d4ae58 Stefan Popa 2020-08-10 339
b0fc6783d4ae58 Stefan Popa 2020-08-10 340 mutex_lock(&st->threshold_m);
b0fc6783d4ae58 Stefan Popa 2020-08-10 @341 ret = regmap_write(st->regmap, addr, ADXL372_THRESH_VAL_H_SEL(threshold));
b0fc6783d4ae58 Stefan Popa 2020-08-10 342 if (ret < 0)
b0fc6783d4ae58 Stefan Popa 2020-08-10 343 goto unlock;
b0fc6783d4ae58 Stefan Popa 2020-08-10 344
b0fc6783d4ae58 Stefan Popa 2020-08-10 345 ret = regmap_update_bits(st->regmap, addr + 1, GENMASK(7, 5),
b0fc6783d4ae58 Stefan Popa 2020-08-10 346 ADXL372_THRESH_VAL_L_SEL(threshold) << 5);
b0fc6783d4ae58 Stefan Popa 2020-08-10 347
b0fc6783d4ae58 Stefan Popa 2020-08-10 348 unlock:
b0fc6783d4ae58 Stefan Popa 2020-08-10 349 mutex_unlock(&st->threshold_m);
b0fc6783d4ae58 Stefan Popa 2020-08-10 350
b0fc6783d4ae58 Stefan Popa 2020-08-10 351 return ret;
b0fc6783d4ae58 Stefan Popa 2020-08-10 352 }
b0fc6783d4ae58 Stefan Popa 2020-08-10 353
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc2 next-20221028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: nios2-randconfig-s033-20221028
compiler: nios2-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=nios2 SHELL=/bin/bash drivers/iio/cdc/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/iio/cdc/ad7746.c:281:23: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/iio/cdc/ad7746.c:297:23: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/iio/cdc/ad7746.c: note: in included file (through include/uapi/linux/swab.h, include/linux/swab.h, include/uapi/linux/byteorder/little_endian.h, ...):
arch/nios2/include/uapi/asm/swab.h:25:24: sparse: sparse: too many arguments for function __builtin_custom_ini
arch/nios2/include/uapi/asm/swab.h:25:24: sparse: sparse: too many arguments for function __builtin_custom_ini
arch/nios2/include/uapi/asm/swab.h:25:24: sparse: sparse: too many arguments for function __builtin_custom_ini
arch/nios2/include/uapi/asm/swab.h:25:24: sparse: sparse: too many arguments for function __builtin_custom_ini
vim +281 drivers/iio/cdc/ad7746.c
6a7e4b04df3f4f drivers/staging/iio/cdc/ad7746.c Lucas Stankus 2021-05-23 265
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 266 static int ad7746_select_channel(struct iio_dev *indio_dev,
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 267 struct iio_chan_spec const *chan)
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 268 {
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 269 struct ad7746_chip_info *chip = iio_priv(indio_dev);
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 270 u8 vt_setup, cap_setup;
afcd0b22e35e0b drivers/staging/iio/cdc/ad7746.c Hernán Gonzalez 2018-04-13 271 int ret, delay, idx;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 272
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 273 switch (chan->type) {
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 274 case IIO_CAPACITANCE:
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 275 cap_setup = FIELD_PREP(AD7746_CAPSETUP_CIN2,
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 276 ad7746_chan_info[chan->address].cin2) |
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 277 FIELD_PREP(AD7746_CAPSETUP_CAPDIFF,
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 278 ad7746_chan_info[chan->address].capdiff) |
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 279 FIELD_PREP(AD7746_CAPSETUP_CAPEN, 1);
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 280 vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 @281 idx = FIELD_GET(AD7746_CONF_CAPFS_MASK, chip->config);
579d542534c96c drivers/staging/iio/cdc/ad7746.c Eva Rachel Retuya 2016-10-28 282 delay = ad7746_cap_filter_rate_table[idx][1];
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 283
6a7e4b04df3f4f drivers/staging/iio/cdc/ad7746.c Lucas Stankus 2021-05-23 284 ret = ad7746_set_capdac(chip, chan->channel);
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 285 if (ret < 0)
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 286 return ret;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 287
050098500ae4f7 drivers/staging/iio/cdc/ad7746.c Alexander Vorwerk 2021-08-21 288 if (chip->capdac_set != chan->channel)
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 289 chip->capdac_set = chan->channel;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 290 break;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 291 case IIO_VOLTAGE:
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 292 case IIO_TEMP:
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 293 vt_setup = FIELD_PREP(AD7746_VTSETUP_VTMD_MASK,
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 294 ad7746_chan_info[chan->address].vtmd) |
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 295 FIELD_PREP(AD7746_VTSETUP_VTEN, 1);
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 296 cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
9eee2fc4a670d7 drivers/staging/iio/cdc/ad7746.c Jonathan Cameron 2022-06-26 297 idx = FIELD_GET(AD7746_CONF_VTFS_MASK, chip->config);
579d542534c96c drivers/staging/iio/cdc/ad7746.c Eva Rachel Retuya 2016-10-28 298 delay = ad7746_cap_filter_rate_table[idx][1];
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 299 break;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 300 default:
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 301 return -EINVAL;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 302 }
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 303
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 304 if (chip->cap_setup != cap_setup) {
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 305 ret = i2c_smbus_write_byte_data(chip->client,
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 306 AD7746_REG_CAP_SETUP,
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 307 cap_setup);
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 308 if (ret < 0)
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 309 return ret;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 310
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 311 chip->cap_setup = cap_setup;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 312 }
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 313
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 314 if (chip->vt_setup != vt_setup) {
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 315 ret = i2c_smbus_write_byte_data(chip->client,
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 316 AD7746_REG_VT_SETUP,
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 317 vt_setup);
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 318 if (ret < 0)
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 319 return ret;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 320
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 321 chip->vt_setup = vt_setup;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 322 }
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 323
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 324 return delay;
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 325 }
83e416f458d532 drivers/staging/iio/adc/ad7746.c Michael Hennerich 2011-09-21 326
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: openrisc-randconfig-s033-20221101
compiler: or1k-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=openrisc SHELL=/bin/bash drivers/mmc/host/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/mmc/host/sdhci.c:1909:31: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/mmc/host/sdhci.c:2433:41: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
vim +1909 drivers/mmc/host/sdhci.c
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1894
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1895 u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1896 unsigned int *actual_clock)
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1897 {
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1898 int div = 0; /* Initialized for compiler warning */
df16219f365f7f drivers/mmc/host/sdhci.c Giuseppe CAVALLARO 2011-11-04 1899 int real_div = div, clk_mul = 1;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1900 u16 clk = 0;
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1901 bool switch_base_clk = false;
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1902
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1903 if (host->version >= SDHCI_SPEC_300) {
da91a8f9c0f56d drivers/mmc/host/sdhci.c Russell King 2014-04-25 1904 if (host->preset_enabled) {
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1905 u16 pre_val;
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1906
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1907 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1908 pre_val = sdhci_get_preset_value(host);
fa0910107a9fea drivers/mmc/host/sdhci.c Masahiro Yamada 2020-03-12 @1909 div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1910 if (host->clk_mul &&
fa0910107a9fea drivers/mmc/host/sdhci.c Masahiro Yamada 2020-03-12 1911 (pre_val & SDHCI_PRESET_CLKGEN_SEL)) {
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1912 clk = SDHCI_PROG_CLOCK_MODE;
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1913 real_div = div + 1;
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1914 clk_mul = host->clk_mul;
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1915 } else {
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1916 real_div = max_t(int, 1, div << 1);
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1917 }
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1918 goto clock_set;
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1919 }
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1920
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1921 /*
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1922 * Check if the Host Controller supports Programmable Clock
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1923 * Mode.
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1924 */
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1925 if (host->clk_mul) {
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1926 for (div = 1; div <= 1024; div++) {
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1927 if ((host->max_clk * host->clk_mul / div)
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1928 <= clock)
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1929 break;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1930 }
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1931 if ((host->max_clk * host->clk_mul / div) <= clock) {
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1932 /*
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1933 * Set Programmable Clock Mode in the Clock
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1934 * Control register.
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1935 */
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1936 clk = SDHCI_PROG_CLOCK_MODE;
df16219f365f7f drivers/mmc/host/sdhci.c Giuseppe CAVALLARO 2011-11-04 1937 real_div = div;
df16219f365f7f drivers/mmc/host/sdhci.c Giuseppe CAVALLARO 2011-11-04 1938 clk_mul = host->clk_mul;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1939 div--;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1940 } else {
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1941 /*
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1942 * Divisor can be too small to reach clock
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1943 * speed requirement. Then use the base clock.
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1944 */
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1945 switch_base_clk = true;
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1946 }
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1947 }
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1948
5497159c460fad drivers/mmc/host/sdhci.c ludovic.desroches@atmel.com 2015-07-29 1949 if (!host->clk_mul || switch_base_clk) {
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1950 /* Version 3.00 divisors must be a multiple of 2. */
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1951 if (host->max_clk <= clock)
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1952 div = 1;
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1953 else {
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1954 for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1955 div += 2) {
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1956 if ((host->max_clk / div) <= clock)
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1957 break;
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1958 }
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1959 }
df16219f365f7f drivers/mmc/host/sdhci.c Giuseppe CAVALLARO 2011-11-04 1960 real_div = div;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1961 div >>= 1;
d1955c3a9a1d89 drivers/mmc/host/sdhci.c Suneel Garapati 2015-06-09 1962 if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
d1955c3a9a1d89 drivers/mmc/host/sdhci.c Suneel Garapati 2015-06-09 1963 && !div && host->max_clk <= 25000000)
d1955c3a9a1d89 drivers/mmc/host/sdhci.c Suneel Garapati 2015-06-09 1964 div = 1;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1965 }
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1966 } else {
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1967 /* Version 2.00 divisors must be a power of 2. */
0397526d6ae251 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-09-20 1968 for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1969 if ((host->max_clk / div) <= clock)
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1970 break;
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1971 }
df16219f365f7f drivers/mmc/host/sdhci.c Giuseppe CAVALLARO 2011-11-04 1972 real_div = div;
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1973 div >>= 1;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1974 }
d129bceb1d44ed drivers/mmc/sdhci.c Pierre Ossman 2006-03-24 1975
52983382c74f59 drivers/mmc/host/sdhci.c Kevin Liu 2013-01-31 1976 clock_set:
03d6f5ffc5c469 drivers/mmc/host/sdhci.c Aisheng Dong 2014-08-27 1977 if (real_div)
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1978 *actual_clock = (host->max_clk * clk_mul) / real_div;
c3ed3877625f10 drivers/mmc/host/sdhci.c Arindam Nath 2011-05-05 1979 clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1980 clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
85105c53b0ce70 drivers/mmc/host/sdhci.c Zhangfei Gao 2010-08-06 1981 << SDHCI_DIVIDER_HI_SHIFT;
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1982
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1983 return clk;
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1984 }
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1985 EXPORT_SYMBOL_GPL(sdhci_calc_clk);
fb9ee04779cf34 drivers/mmc/host/sdhci.c Ludovic Desroches 2016-04-07 1986
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: arm-randconfig-s053-20221101
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm SHELL=/bin/bash drivers/infiniband/core/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
drivers/infiniband/core/cm.c:1272:20: sparse: sparse: cast from restricted __be32
>> drivers/infiniband/core/cm.c:1613:18: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:1638:34: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:1655:34: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:1658:34: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:1687:17: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:1715:25: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2030:21: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2037:21: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2044:21: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2051:21: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2088:28: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2172:25: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2981:25: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:2993:13: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:3032:21: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:3237:40: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:3239:40: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/infiniband/core/cm.c:3530:23: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
vim +1613 drivers/infiniband/core/cm.c
a977049dacdef6a Hal Rosenstock 2005-07-27 1610
6b3c0e6e6d5abfe Dasaratharaman Chandramouli 2017-06-08 1611 static bool cm_req_has_alt_path(struct cm_req_msg *req_msg)
6b3c0e6e6d5abfe Dasaratharaman Chandramouli 2017-06-08 1612 {
91b60a7128d9624 Jason Gunthorpe 2020-01-16 @1613 return ((cpu_to_be16(
91b60a7128d9624 Jason Gunthorpe 2020-01-16 1614 IBA_GET(CM_REQ_ALTERNATE_LOCAL_PORT_LID, req_msg))) ||
4ca662a30a3c9c8 Jason Gunthorpe 2020-01-16 1615 (ib_is_opa_gid(IBA_GET_MEM_PTR(CM_REQ_ALTERNATE_LOCAL_PORT_GID,
4ca662a30a3c9c8 Jason Gunthorpe 2020-01-16 1616 req_msg))));
6b3c0e6e6d5abfe Dasaratharaman Chandramouli 2017-06-08 1617 }
6b3c0e6e6d5abfe Dasaratharaman Chandramouli 2017-06-08 1618
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: ia64-randconfig-s041-20221031
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/i2c/busses/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
drivers/i2c/busses/i2c-npcm7xx.c:1135:61: sparse: sparse: Using plain integer as NULL pointer
>> drivers/i2c/busses/i2c-npcm7xx.c:466:18: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/i2c/busses/i2c-npcm7xx.c:479:18: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/i2c/busses/i2c-npcm7xx.c:1655:13: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/i2c/busses/i2c-npcm7xx.c:1660:13: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/i2c/busses/i2c-npcm7xx.c:1666:13: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/i2c/busses/i2c-npcm7xx.c:1681:13: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/i2c/busses/i2c-npcm7xx.c:1687:13: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
vim +466 drivers/i2c/busses/i2c-npcm7xx.c
56a1485b102ed1 Tali Perry 2020-05-27 455
56a1485b102ed1 Tali Perry 2020-05-27 456 static inline bool npcm_i2c_tx_fifo_empty(struct npcm_i2c *bus)
56a1485b102ed1 Tali Perry 2020-05-27 457 {
56a1485b102ed1 Tali Perry 2020-05-27 458 u8 tx_fifo_sts;
56a1485b102ed1 Tali Perry 2020-05-27 459
56a1485b102ed1 Tali Perry 2020-05-27 460 tx_fifo_sts = ioread8(bus->reg + NPCM_I2CTXF_STS);
56a1485b102ed1 Tali Perry 2020-05-27 461 /* check if TX FIFO is not empty */
bbc38ed53a02a7 Tyrone Ting 2022-05-25 462 if ((tx_fifo_sts & bus->data->txf_sts_tx_bytes) == 0)
56a1485b102ed1 Tali Perry 2020-05-27 463 return false;
56a1485b102ed1 Tali Perry 2020-05-27 464
56a1485b102ed1 Tali Perry 2020-05-27 465 /* check if TX FIFO status bit is set: */
56a1485b102ed1 Tali Perry 2020-05-27 @466 return !!FIELD_GET(NPCM_I2CTXF_STS_TX_THST, tx_fifo_sts);
56a1485b102ed1 Tali Perry 2020-05-27 467 }
56a1485b102ed1 Tali Perry 2020-05-27 468
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: ia64-randconfig-s043-20221031
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/pci/controller/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/pci/controller/pcie-brcmstb.c:1059:15: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/pci/controller/pcie-brcmstb.c:1060:15: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
vim +1059 drivers/pci/controller/pcie-brcmstb.c
0693b4207fd73c Jim Quinlan 2022-07-25 1022
0693b4207fd73c Jim Quinlan 2022-07-25 1023 static int brcm_pcie_start_link(struct brcm_pcie *pcie)
0693b4207fd73c Jim Quinlan 2022-07-25 1024 {
0693b4207fd73c Jim Quinlan 2022-07-25 1025 struct device *dev = pcie->dev;
0693b4207fd73c Jim Quinlan 2022-07-25 1026 void __iomem *base = pcie->base;
0693b4207fd73c Jim Quinlan 2022-07-25 1027 u16 nlw, cls, lnksta;
0693b4207fd73c Jim Quinlan 2022-07-25 1028 bool ssc_good = false;
0693b4207fd73c Jim Quinlan 2022-07-25 1029 u32 tmp;
0693b4207fd73c Jim Quinlan 2022-07-25 1030 int ret, i;
0693b4207fd73c Jim Quinlan 2022-07-25 1031
0693b4207fd73c Jim Quinlan 2022-07-25 1032 /* Unassert the fundamental reset */
0693b4207fd73c Jim Quinlan 2022-07-25 1033 pcie->perst_set(pcie, 0);
f4fd559de3434c Bjorn Helgaas 2022-05-11 1034
f4fd559de3434c Bjorn Helgaas 2022-05-11 1035 /*
0693b4207fd73c Jim Quinlan 2022-07-25 1036 * Give the RC/EP time to wake up, before trying to configure RC.
0693b4207fd73c Jim Quinlan 2022-07-25 1037 * Intermittently check status for link-up, up to a total of 100ms.
f4fd559de3434c Bjorn Helgaas 2022-05-11 1038 */
0693b4207fd73c Jim Quinlan 2022-07-25 1039 for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5)
0693b4207fd73c Jim Quinlan 2022-07-25 1040 msleep(5);
0693b4207fd73c Jim Quinlan 2022-07-25 1041
0693b4207fd73c Jim Quinlan 2022-07-25 1042 if (!brcm_pcie_link_up(pcie)) {
0693b4207fd73c Jim Quinlan 2022-07-25 1043 dev_err(dev, "link down\n");
0693b4207fd73c Jim Quinlan 2022-07-25 1044 return -ENODEV;
0693b4207fd73c Jim Quinlan 2022-07-25 1045 }
0693b4207fd73c Jim Quinlan 2022-07-25 1046
0693b4207fd73c Jim Quinlan 2022-07-25 1047 if (pcie->gen)
0693b4207fd73c Jim Quinlan 2022-07-25 1048 brcm_pcie_set_gen(pcie, pcie->gen);
f4fd559de3434c Bjorn Helgaas 2022-05-11 1049
c0452137034bda Jim Quinlan 2019-12-16 1050 if (pcie->ssc) {
c0452137034bda Jim Quinlan 2019-12-16 1051 ret = brcm_pcie_set_ssc(pcie);
c0452137034bda Jim Quinlan 2019-12-16 1052 if (ret == 0)
c0452137034bda Jim Quinlan 2019-12-16 1053 ssc_good = true;
c0452137034bda Jim Quinlan 2019-12-16 1054 else
c0452137034bda Jim Quinlan 2019-12-16 1055 dev_err(dev, "failed attempt to enter ssc mode\n");
c0452137034bda Jim Quinlan 2019-12-16 1056 }
c0452137034bda Jim Quinlan 2019-12-16 1057
c0452137034bda Jim Quinlan 2019-12-16 1058 lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
c0452137034bda Jim Quinlan 2019-12-16 @1059 cls = FIELD_GET(PCI_EXP_LNKSTA_CLS, lnksta);
c0452137034bda Jim Quinlan 2019-12-16 1060 nlw = FIELD_GET(PCI_EXP_LNKSTA_NLW, lnksta);
c0452137034bda Jim Quinlan 2019-12-16 1061 dev_info(dev, "link up, %s x%u %s\n",
6348a34dcb98d8 Bjorn Helgaas 2020-02-28 1062 pci_speed_string(pcie_link_speed[cls]), nlw,
6348a34dcb98d8 Bjorn Helgaas 2020-02-28 1063 ssc_good ? "(SSC)" : "(!SSC)");
c0452137034bda Jim Quinlan 2019-12-16 1064
c0452137034bda Jim Quinlan 2019-12-16 1065 /*
c0452137034bda Jim Quinlan 2019-12-16 1066 * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1
c0452137034bda Jim Quinlan 2019-12-16 1067 * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1.
c0452137034bda Jim Quinlan 2019-12-16 1068 */
c0452137034bda Jim Quinlan 2019-12-16 1069 tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
c0452137034bda Jim Quinlan 2019-12-16 1070 tmp |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK;
c0452137034bda Jim Quinlan 2019-12-16 1071 writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
c0452137034bda Jim Quinlan 2019-12-16 1072
c0452137034bda Jim Quinlan 2019-12-16 1073 return 0;
c0452137034bda Jim Quinlan 2019-12-16 1074 }
c0452137034bda Jim Quinlan 2019-12-16 1075
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: arm64-randconfig-s053-20221101
compiler: aarch64-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/perf/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/perf/arm-cmn.c:404:16: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/perf/arm-cmn.c: note: in included file (through arch/arm64/include/asm/io.h, include/linux/io.h, include/linux/irq.h, ...):
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:389:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long long [usertype] val @@ got restricted __le64 [usertype] @@
include/asm-generic/io.h:389:22: sparse: expected unsigned long long [usertype] val
include/asm-generic/io.h:389:22: sparse: got restricted __le64 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:335:15: sparse: sparse: cast to restricted __le32
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:348:15: sparse: sparse: cast to restricted __le64
include/asm-generic/io.h:379:22: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int [usertype] val @@ got restricted __le32 [usertype] @@
include/asm-generic/io.h:379:22: sparse: expected unsigned int [usertype] val
include/asm-generic/io.h:379:22: sparse: got restricted __le32 [usertype]
vim +404 drivers/perf/arm-cmn.c
a88fa6c28b867a Robin Murphy 2021-12-03 400
a88fa6c28b867a Robin Murphy 2021-12-03 401 #ifdef CONFIG_DEBUG_FS
a88fa6c28b867a Robin Murphy 2021-12-03 402 static const char *arm_cmn_device_type(u8 type)
a88fa6c28b867a Robin Murphy 2021-12-03 403 {
c5781212985a76 Robin Murphy 2022-05-11 @404 switch(FIELD_GET(CMN__CONNECT_INFO_DEVICE_TYPE, type)) {
8e504d93acb647 Robin Murphy 2022-04-18 405 case 0x00: return " |";
a88fa6c28b867a Robin Murphy 2021-12-03 406 case 0x01: return " RN-I |";
a88fa6c28b867a Robin Murphy 2021-12-03 407 case 0x02: return " RN-D |";
a88fa6c28b867a Robin Murphy 2021-12-03 408 case 0x04: return " RN-F_B |";
a88fa6c28b867a Robin Murphy 2021-12-03 409 case 0x05: return "RN-F_B_E|";
a88fa6c28b867a Robin Murphy 2021-12-03 410 case 0x06: return " RN-F_A |";
a88fa6c28b867a Robin Murphy 2021-12-03 411 case 0x07: return "RN-F_A_E|";
a88fa6c28b867a Robin Murphy 2021-12-03 412 case 0x08: return " HN-T |";
a88fa6c28b867a Robin Murphy 2021-12-03 413 case 0x09: return " HN-I |";
a88fa6c28b867a Robin Murphy 2021-12-03 414 case 0x0a: return " HN-D |";
8e504d93acb647 Robin Murphy 2022-04-18 415 case 0x0b: return " HN-P |";
a88fa6c28b867a Robin Murphy 2021-12-03 416 case 0x0c: return " SN-F |";
a88fa6c28b867a Robin Murphy 2021-12-03 417 case 0x0d: return " SBSX |";
a88fa6c28b867a Robin Murphy 2021-12-03 418 case 0x0e: return " HN-F |";
a88fa6c28b867a Robin Murphy 2021-12-03 419 case 0x0f: return " SN-F_E |";
a88fa6c28b867a Robin Murphy 2021-12-03 420 case 0x10: return " SN-F_D |";
a88fa6c28b867a Robin Murphy 2021-12-03 421 case 0x11: return " CXHA |";
a88fa6c28b867a Robin Murphy 2021-12-03 422 case 0x12: return " CXRA |";
a88fa6c28b867a Robin Murphy 2021-12-03 423 case 0x13: return " CXRH |";
a88fa6c28b867a Robin Murphy 2021-12-03 424 case 0x14: return " RN-F_D |";
a88fa6c28b867a Robin Murphy 2021-12-03 425 case 0x15: return "RN-F_D_E|";
a88fa6c28b867a Robin Murphy 2021-12-03 426 case 0x16: return " RN-F_C |";
a88fa6c28b867a Robin Murphy 2021-12-03 427 case 0x17: return "RN-F_C_E|";
8e504d93acb647 Robin Murphy 2022-04-18 428 case 0x18: return " RN-F_E |";
8e504d93acb647 Robin Murphy 2022-04-18 429 case 0x19: return "RN-F_E_E|";
a88fa6c28b867a Robin Murphy 2021-12-03 430 case 0x1c: return " MTSX |";
23760a0144173e Robin Murphy 2022-04-18 431 case 0x1d: return " HN-V |";
23760a0144173e Robin Murphy 2022-04-18 432 case 0x1e: return " CCG |";
8e504d93acb647 Robin Murphy 2022-04-18 433 default: return " ???? |";
a88fa6c28b867a Robin Murphy 2021-12-03 434 }
a88fa6c28b867a Robin Murphy 2021-12-03 435 }
a88fa6c28b867a Robin Murphy 2021-12-03 436
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: csky-randconfig-s031-20221031
compiler: csky-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=csky SHELL=/bin/bash drivers/iio/dac/ drivers/net/wireless/mediatek/mt76/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/iio/dac/ad7293.c:468:16: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/iio/dac/ad7293.c:524:40: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
--
drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c: note: in included file:
>> drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h:1668:39: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h:1669:39: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
>> drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c:2728:28: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c:2729:28: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
>> drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h:1650:16: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
--
drivers/net/wireless/mediatek/mt76/mt7615/mcu.c: note: in included file (through drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h):
>> drivers/net/wireless/mediatek/mt76/mt7615/../mt76_connac_mcu.h:1650:16: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
vim +468 drivers/iio/dac/ad7293.c
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 404
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 405 static int ad7293_ch_read_raw(struct ad7293_state *st, enum ad7293_ch_type type,
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 406 unsigned int ch, u16 *raw)
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 407 {
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 408 int ret;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 409 unsigned int reg_wr, reg_rd, data_wr;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 410
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 411 switch (type) {
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 412 case AD7293_ADC_VINX:
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 413 reg_wr = AD7293_REG_VINX_SEQ;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 414 reg_rd = AD7293_REG_VIN0 + ch;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 415 data_wr = BIT(ch);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 416
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 417 break;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 418 case AD7293_ADC_TSENSE:
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 419 reg_wr = AD7293_REG_ISENSEX_TSENSEX_SEQ;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 420 reg_rd = AD7293_REG_TSENSE_INT + ch;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 421 data_wr = BIT(ch);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 422
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 423 break;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 424 case AD7293_ADC_ISENSE:
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 425 reg_wr = AD7293_REG_ISENSEX_TSENSEX_SEQ;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 426 reg_rd = AD7293_REG_ISENSE_0 + ch;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 427 data_wr = BIT(ch) << 8;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 428
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 429 break;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 430 case AD7293_DAC:
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 431 reg_rd = AD7293_REG_UNI_VOUT0 + ch;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 432
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 433 break;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 434 default:
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 435 return -EINVAL;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 436 }
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 437
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 438 mutex_lock(&st->lock);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 439
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 440 if (type != AD7293_DAC) {
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 441 if (type == AD7293_ADC_TSENSE) {
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 442 ret = __ad7293_spi_write(st, AD7293_REG_TSENSE_BG_EN,
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 443 BIT(ch));
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 444 if (ret)
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 445 goto exit;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 446
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 447 usleep_range(9000, 9900);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 448 } else if (type == AD7293_ADC_ISENSE) {
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 449 ret = __ad7293_spi_write(st, AD7293_REG_ISENSE_BG_EN,
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 450 BIT(ch));
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 451 if (ret)
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 452 goto exit;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 453
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 454 usleep_range(2000, 7000);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 455 }
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 456
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 457 ret = __ad7293_spi_write(st, reg_wr, data_wr);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 458 if (ret)
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 459 goto exit;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 460
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 461 ret = __ad7293_spi_write(st, AD7293_REG_CONV_CMD, 0x82);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 462 if (ret)
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 463 goto exit;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 464 }
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 465
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 466 ret = __ad7293_spi_read(st, reg_rd, raw);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 467
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 @468 *raw = FIELD_GET(AD7293_REG_DATA_RAW_MSK, *raw);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 469
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 470 exit:
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 471 mutex_unlock(&st->lock);
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 472
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 473 return ret;
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 474 }
0bb12606c05fe9 Antoniu Miclaus 2021-12-02 475
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: ia64-randconfig-s053-20221031
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/cxl/core/ drivers/net/ethernet/intel/ice/ drivers/net/phy/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
drivers/cxl/core/pci.c: note: in included file (through arch/ia64/include/asm/io.h, include/linux/io.h, include/linux/io-64-nonatomic-lo-hi.h):
include/asm-generic/io.h:239:15: sparse: sparse: cast to restricted __le64
>> drivers/cxl/core/pci.c:380:21: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
drivers/cxl/core/pci.c:395:28: sparse: sparse: cast truncates bits from constant value (ffff0001 becomes 1)
--
>> drivers/net/phy/aquantia_main.c:487:14: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
--
>> drivers/net/ethernet/intel/ice/ice_common.c:3742:25: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:3745:32: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:3748:38: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:3756:33: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:3759:39: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:3769:34: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:3771:45: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c: note: in included file (through arch/ia64/include/asm/io.h, include/linux/io.h, drivers/net/ethernet/intel/ice/ice_osdep.h, ...):
include/asm-generic/io.h:239:15: sparse: sparse: cast to restricted __le64
drivers/net/ethernet/intel/ice/ice_common.c:5106:21: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/net/ethernet/intel/ice/ice_common.c:5157:21: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
vim +380 drivers/cxl/core/pci.c
a12562bb707760 Dan Williams 2022-05-18 339
a12562bb707760 Dan Williams 2022-05-18 340 /**
a12562bb707760 Dan Williams 2022-05-18 341 * cxl_hdm_decode_init() - Setup HDM decoding for the endpoint
a12562bb707760 Dan Williams 2022-05-18 342 * @cxlds: Device state
fcfbc93cc33ec6 Dan Williams 2022-05-18 343 * @cxlhdm: Mapped HDM decoder Capability
a12562bb707760 Dan Williams 2022-05-18 344 *
a12562bb707760 Dan Williams 2022-05-18 345 * Try to enable the endpoint's HDM Decoder Capability
a12562bb707760 Dan Williams 2022-05-18 346 */
fcfbc93cc33ec6 Dan Williams 2022-05-18 347 int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm)
14d78874077442 Dan Williams 2022-05-18 348 {
14d78874077442 Dan Williams 2022-05-18 349 struct pci_dev *pdev = to_pci_dev(cxlds->dev);
92804edb11f065 Dan Williams 2022-05-18 350 struct cxl_endpoint_dvsec_info info = { 0 };
14d78874077442 Dan Williams 2022-05-18 351 int hdm_count, rc, i, ranges = 0;
14d78874077442 Dan Williams 2022-05-18 352 struct device *dev = &pdev->dev;
14d78874077442 Dan Williams 2022-05-18 353 int d = cxlds->cxl_dvsec;
14d78874077442 Dan Williams 2022-05-18 354 u16 cap, ctrl;
14d78874077442 Dan Williams 2022-05-18 355
14d78874077442 Dan Williams 2022-05-18 356 if (!d) {
14d78874077442 Dan Williams 2022-05-18 357 dev_dbg(dev, "No DVSEC Capability\n");
14d78874077442 Dan Williams 2022-05-18 358 return -ENXIO;
14d78874077442 Dan Williams 2022-05-18 359 }
14d78874077442 Dan Williams 2022-05-18 360
14d78874077442 Dan Williams 2022-05-18 361 rc = pci_read_config_word(pdev, d + CXL_DVSEC_CAP_OFFSET, &cap);
14d78874077442 Dan Williams 2022-05-18 362 if (rc)
14d78874077442 Dan Williams 2022-05-18 363 return rc;
14d78874077442 Dan Williams 2022-05-18 364
14d78874077442 Dan Williams 2022-05-18 365 rc = pci_read_config_word(pdev, d + CXL_DVSEC_CTRL_OFFSET, &ctrl);
14d78874077442 Dan Williams 2022-05-18 366 if (rc)
14d78874077442 Dan Williams 2022-05-18 367 return rc;
14d78874077442 Dan Williams 2022-05-18 368
14d78874077442 Dan Williams 2022-05-18 369 if (!(cap & CXL_DVSEC_MEM_CAPABLE)) {
14d78874077442 Dan Williams 2022-05-18 370 dev_dbg(dev, "Not MEM Capable\n");
14d78874077442 Dan Williams 2022-05-18 371 return -ENXIO;
14d78874077442 Dan Williams 2022-05-18 372 }
14d78874077442 Dan Williams 2022-05-18 373
14d78874077442 Dan Williams 2022-05-18 374 /*
14d78874077442 Dan Williams 2022-05-18 375 * It is not allowed by spec for MEM.capable to be set and have 0 legacy
14d78874077442 Dan Williams 2022-05-18 376 * HDM decoders (values > 2 are also undefined as of CXL 2.0). As this
14d78874077442 Dan Williams 2022-05-18 377 * driver is for a spec defined class code which must be CXL.mem
14d78874077442 Dan Williams 2022-05-18 378 * capable, there is no point in continuing to enable CXL.mem.
14d78874077442 Dan Williams 2022-05-18 379 */
14d78874077442 Dan Williams 2022-05-18 @380 hdm_count = FIELD_GET(CXL_DVSEC_HDM_COUNT_MASK, cap);
14d78874077442 Dan Williams 2022-05-18 381 if (!hdm_count || hdm_count > 2)
14d78874077442 Dan Williams 2022-05-18 382 return -EINVAL;
14d78874077442 Dan Williams 2022-05-18 383
14d78874077442 Dan Williams 2022-05-18 384 rc = wait_for_valid(cxlds);
14d78874077442 Dan Williams 2022-05-18 385 if (rc) {
14d78874077442 Dan Williams 2022-05-18 386 dev_dbg(dev, "Failure awaiting MEM_INFO_VALID (%d)\n", rc);
14d78874077442 Dan Williams 2022-05-18 387 return rc;
14d78874077442 Dan Williams 2022-05-18 388 }
14d78874077442 Dan Williams 2022-05-18 389
34e37b4c432cd0 Dan Williams 2022-05-20 390 /*
34e37b4c432cd0 Dan Williams 2022-05-20 391 * The current DVSEC values are moot if the memory capability is
34e37b4c432cd0 Dan Williams 2022-05-20 392 * disabled, and they will remain moot after the HDM Decoder
34e37b4c432cd0 Dan Williams 2022-05-20 393 * capability is enabled.
34e37b4c432cd0 Dan Williams 2022-05-20 394 */
92804edb11f065 Dan Williams 2022-05-18 395 info.mem_enabled = FIELD_GET(CXL_DVSEC_MEM_ENABLE, ctrl);
92804edb11f065 Dan Williams 2022-05-18 396 if (!info.mem_enabled)
34e37b4c432cd0 Dan Williams 2022-05-20 397 goto hdm_init;
14d78874077442 Dan Williams 2022-05-18 398
14d78874077442 Dan Williams 2022-05-18 399 for (i = 0; i < hdm_count; i++) {
14d78874077442 Dan Williams 2022-05-18 400 u64 base, size;
14d78874077442 Dan Williams 2022-05-18 401 u32 temp;
14d78874077442 Dan Williams 2022-05-18 402
14d78874077442 Dan Williams 2022-05-18 403 rc = pci_read_config_dword(
14d78874077442 Dan Williams 2022-05-18 404 pdev, d + CXL_DVSEC_RANGE_SIZE_HIGH(i), &temp);
14d78874077442 Dan Williams 2022-05-18 405 if (rc)
14d78874077442 Dan Williams 2022-05-18 406 return rc;
14d78874077442 Dan Williams 2022-05-18 407
14d78874077442 Dan Williams 2022-05-18 408 size = (u64)temp << 32;
14d78874077442 Dan Williams 2022-05-18 409
14d78874077442 Dan Williams 2022-05-18 410 rc = pci_read_config_dword(
14d78874077442 Dan Williams 2022-05-18 411 pdev, d + CXL_DVSEC_RANGE_SIZE_LOW(i), &temp);
14d78874077442 Dan Williams 2022-05-18 412 if (rc)
14d78874077442 Dan Williams 2022-05-18 413 return rc;
14d78874077442 Dan Williams 2022-05-18 414
14d78874077442 Dan Williams 2022-05-18 415 size |= temp & CXL_DVSEC_MEM_SIZE_LOW_MASK;
14d78874077442 Dan Williams 2022-05-18 416
14d78874077442 Dan Williams 2022-05-18 417 rc = pci_read_config_dword(
14d78874077442 Dan Williams 2022-05-18 418 pdev, d + CXL_DVSEC_RANGE_BASE_HIGH(i), &temp);
14d78874077442 Dan Williams 2022-05-18 419 if (rc)
14d78874077442 Dan Williams 2022-05-18 420 return rc;
14d78874077442 Dan Williams 2022-05-18 421
14d78874077442 Dan Williams 2022-05-18 422 base = (u64)temp << 32;
14d78874077442 Dan Williams 2022-05-18 423
14d78874077442 Dan Williams 2022-05-18 424 rc = pci_read_config_dword(
14d78874077442 Dan Williams 2022-05-18 425 pdev, d + CXL_DVSEC_RANGE_BASE_LOW(i), &temp);
14d78874077442 Dan Williams 2022-05-18 426 if (rc)
14d78874077442 Dan Williams 2022-05-18 427 return rc;
14d78874077442 Dan Williams 2022-05-18 428
14d78874077442 Dan Williams 2022-05-18 429 base |= temp & CXL_DVSEC_MEM_BASE_LOW_MASK;
14d78874077442 Dan Williams 2022-05-18 430
92804edb11f065 Dan Williams 2022-05-18 431 info.dvsec_range[i] = (struct range) {
14d78874077442 Dan Williams 2022-05-18 432 .start = base,
14d78874077442 Dan Williams 2022-05-18 433 .end = base + size - 1
14d78874077442 Dan Williams 2022-05-18 434 };
14d78874077442 Dan Williams 2022-05-18 435
14d78874077442 Dan Williams 2022-05-18 436 if (size)
14d78874077442 Dan Williams 2022-05-18 437 ranges++;
14d78874077442 Dan Williams 2022-05-18 438 }
14d78874077442 Dan Williams 2022-05-18 439
92804edb11f065 Dan Williams 2022-05-18 440 info.ranges = ranges;
14d78874077442 Dan Williams 2022-05-18 441
a12562bb707760 Dan Williams 2022-05-18 442 /*
a12562bb707760 Dan Williams 2022-05-18 443 * If DVSEC ranges are being used instead of HDM decoder registers there
a12562bb707760 Dan Williams 2022-05-18 444 * is no use in trying to manage those.
a12562bb707760 Dan Williams 2022-05-18 445 */
34e37b4c432cd0 Dan Williams 2022-05-20 446 hdm_init:
fcfbc93cc33ec6 Dan Williams 2022-05-18 447 if (!__cxl_hdm_decode_init(cxlds, cxlhdm, &info)) {
a12562bb707760 Dan Williams 2022-05-18 448 dev_err(dev,
a12562bb707760 Dan Williams 2022-05-18 449 "Legacy range registers configuration prevents HDM operation.\n");
a12562bb707760 Dan Williams 2022-05-18 450 return -EBUSY;
a12562bb707760 Dan Williams 2022-05-18 451 }
a12562bb707760 Dan Williams 2022-05-18 452
14d78874077442 Dan Williams 2022-05-18 453 return 0;
14d78874077442 Dan Williams 2022-05-18 454 }
a12562bb707760 Dan Williams 2022-05-18 455 EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, CXL);
c97006046c791f Ira Weiny 2022-07-19 456
Hi Gwan-gyeong,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.1-rc3 next-20221101]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
patch link: https://lore.kernel.org/r/20221029053429.38381-1-gwan-gyeong.mun%40intel.com
patch subject: [PATCH] bitfield: Use argument type for size comparison on Bitfield access macros
config: arm-randconfig-s032-20221031
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/91f22fce5cc0639c001bcf755c9dec0913073876
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Gwan-gyeong-Mun/bitfield-Use-argument-type-for-size-comparison-on-Bitfield-access-macros/20221029-133640
git checkout 91f22fce5cc0639c001bcf755c9dec0913073876
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/drm_edid.c:6095:17: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
drivers/gpu/drm/drm_edid.c:6115:35: sparse: sparse: cast truncates bits from constant value (ffffff01 becomes 1)
vim +6095 drivers/gpu/drm/drm_edid.c
a1d11d1efe4d18 Manasi Navare 2020-03-10 6073
18a9cbbe558016 Jani Nikula 2021-08-31 6074 static void drm_parse_vesa_mso_data(struct drm_connector *connector,
18a9cbbe558016 Jani Nikula 2021-08-31 6075 const struct displayid_block *block)
18a9cbbe558016 Jani Nikula 2021-08-31 6076 {
18a9cbbe558016 Jani Nikula 2021-08-31 6077 struct displayid_vesa_vendor_specific_block *vesa =
18a9cbbe558016 Jani Nikula 2021-08-31 6078 (struct displayid_vesa_vendor_specific_block *)block;
18a9cbbe558016 Jani Nikula 2021-08-31 6079 struct drm_display_info *info = &connector->display_info;
18a9cbbe558016 Jani Nikula 2021-08-31 6080
18a9cbbe558016 Jani Nikula 2021-08-31 6081 if (block->num_bytes < 3) {
18a9cbbe558016 Jani Nikula 2021-08-31 6082 drm_dbg_kms(connector->dev, "Unexpected vendor block size %u\n",
18a9cbbe558016 Jani Nikula 2021-08-31 6083 block->num_bytes);
18a9cbbe558016 Jani Nikula 2021-08-31 6084 return;
18a9cbbe558016 Jani Nikula 2021-08-31 6085 }
18a9cbbe558016 Jani Nikula 2021-08-31 6086
18a9cbbe558016 Jani Nikula 2021-08-31 6087 if (oui(vesa->oui[0], vesa->oui[1], vesa->oui[2]) != VESA_IEEE_OUI)
18a9cbbe558016 Jani Nikula 2021-08-31 6088 return;
18a9cbbe558016 Jani Nikula 2021-08-31 6089
18a9cbbe558016 Jani Nikula 2021-08-31 6090 if (sizeof(*vesa) != sizeof(*block) + block->num_bytes) {
18a9cbbe558016 Jani Nikula 2021-08-31 6091 drm_dbg_kms(connector->dev, "Unexpected VESA vendor block size\n");
18a9cbbe558016 Jani Nikula 2021-08-31 6092 return;
18a9cbbe558016 Jani Nikula 2021-08-31 6093 }
18a9cbbe558016 Jani Nikula 2021-08-31 6094
18a9cbbe558016 Jani Nikula 2021-08-31 @6095 switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) {
18a9cbbe558016 Jani Nikula 2021-08-31 6096 default:
18a9cbbe558016 Jani Nikula 2021-08-31 6097 drm_dbg_kms(connector->dev, "Reserved MSO mode value\n");
18a9cbbe558016 Jani Nikula 2021-08-31 6098 fallthrough;
18a9cbbe558016 Jani Nikula 2021-08-31 6099 case 0:
18a9cbbe558016 Jani Nikula 2021-08-31 6100 info->mso_stream_count = 0;
18a9cbbe558016 Jani Nikula 2021-08-31 6101 break;
18a9cbbe558016 Jani Nikula 2021-08-31 6102 case 1:
18a9cbbe558016 Jani Nikula 2021-08-31 6103 info->mso_stream_count = 2; /* 2 or 4 links */
18a9cbbe558016 Jani Nikula 2021-08-31 6104 break;
18a9cbbe558016 Jani Nikula 2021-08-31 6105 case 2:
18a9cbbe558016 Jani Nikula 2021-08-31 6106 info->mso_stream_count = 4; /* 4 links */
18a9cbbe558016 Jani Nikula 2021-08-31 6107 break;
18a9cbbe558016 Jani Nikula 2021-08-31 6108 }
18a9cbbe558016 Jani Nikula 2021-08-31 6109
18a9cbbe558016 Jani Nikula 2021-08-31 6110 if (!info->mso_stream_count) {
18a9cbbe558016 Jani Nikula 2021-08-31 6111 info->mso_pixel_overlap = 0;
18a9cbbe558016 Jani Nikula 2021-08-31 6112 return;
18a9cbbe558016 Jani Nikula 2021-08-31 6113 }
18a9cbbe558016 Jani Nikula 2021-08-31 6114
18a9cbbe558016 Jani Nikula 2021-08-31 6115 info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, vesa->mso);
18a9cbbe558016 Jani Nikula 2021-08-31 6116 if (info->mso_pixel_overlap > 8) {
18a9cbbe558016 Jani Nikula 2021-08-31 6117 drm_dbg_kms(connector->dev, "Reserved MSO pixel overlap value %u\n",
18a9cbbe558016 Jani Nikula 2021-08-31 6118 info->mso_pixel_overlap);
18a9cbbe558016 Jani Nikula 2021-08-31 6119 info->mso_pixel_overlap = 8;
18a9cbbe558016 Jani Nikula 2021-08-31 6120 }
18a9cbbe558016 Jani Nikula 2021-08-31 6121
18a9cbbe558016 Jani Nikula 2021-08-31 6122 drm_dbg_kms(connector->dev, "MSO stream count %u, pixel overlap %u\n",
18a9cbbe558016 Jani Nikula 2021-08-31 6123 info->mso_stream_count, info->mso_pixel_overlap);
18a9cbbe558016 Jani Nikula 2021-08-31 6124 }
18a9cbbe558016 Jani Nikula 2021-08-31 6125
diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index c9be1657f03d..4382bd62b14f 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -9,6 +9,7 @@ #include <linux/build_bug.h> #include <asm/byteorder.h> +#include <linux/overflow.h> /* * Bitfield access macros @@ -69,7 +70,8 @@ ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ _pfx "value too large for the field"); \ BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ - __bf_cast_unsigned(_reg, ~0ull), \ + __bf_cast_unsigned(_reg, \ + type_max(__unsigned_scalar_typeof(_reg))), \ _pfx "type of reg too small for mask"); \ __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ (1ULL << __bf_shf(_mask))); \ @@ -84,7 +86,10 @@ */ #define FIELD_MAX(_mask) \ ({ \ - __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ + __BF_FIELD_CHECK(_mask, \ + type_min(__unsigned_scalar_typeof(_mask)), \ + type_min(__unsigned_scalar_typeof(_mask)), \ + "FIELD_MAX: "); \ (typeof(_mask))((_mask) >> __bf_shf(_mask)); \ }) @@ -97,7 +102,10 @@ */ #define FIELD_FIT(_mask, _val) \ ({ \ - __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \ + __BF_FIELD_CHECK(_mask, \ + type_min(__unsigned_scalar_typeof(_mask)), \ + type_min(__unsigned_scalar_typeof(_val)), \ + "FIELD_FIT: "); \ !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ }) @@ -111,7 +119,9 @@ */ #define FIELD_PREP(_mask, _val) \ ({ \ - __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ + __BF_FIELD_CHECK(_mask, \ + type_min(__unsigned_scalar_typeof(_mask)), \ + _val, "FIELD_PREP: "); \ ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ }) @@ -125,7 +135,9 @@ */ #define FIELD_GET(_mask, _reg) \ ({ \ - __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ + __BF_FIELD_CHECK(_mask, _reg, \ + type_min(__unsigned_scalar_typeof(_reg)), \ + "FIELD_GET: "); \ (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ })