diff mbox series

[v3,30/60] arm64: idreg-override: Create a pseudo feature for rodata=off

Message ID 20230307140522.2311461-31-ardb@kernel.org
State New
Headers
Series arm64: Add support for LPA2 at stage1 and WXN |

Commit Message

Ard Biesheuvel March 7, 2023, 2:04 p.m. UTC 
  Add rodata=off to the set of kernel command line options that is parsed
early using the CPU feature override detection code, so we can easily
refer to it when creating the kernel mapping.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/include/asm/cpufeature.h   | 1 +
 arch/arm64/kernel/pi/idreg-override.c | 2 ++
 2 files changed, 3 insertions(+)

Comments

Ryan Roberts April 17, 2023, 2:28 p.m. UTC | #1 
On 07/03/2023 14:04, Ard Biesheuvel wrote:
> Add rodata=off to the set of kernel command line options that is parsed
> early using the CPU feature override detection code, so we can easily
> refer to it when creating the kernel mapping.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> ---
>  arch/arm64/include/asm/cpufeature.h   | 1 +
>  arch/arm64/kernel/pi/idreg-override.c | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index bc10098901808c00..edc7733aa49846b2 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -16,6 +16,7 @@
>  #define cpu_feature(x)		KERNEL_HWCAP_ ## x
>  
>  #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR	0
> +#define ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF	4

I assume these are bit numbers? Why not just use the next available bit (bit 1)
for this new flag?

>  
>  #ifndef __ASSEMBLY__
>  
> diff --git a/arch/arm64/kernel/pi/idreg-override.c b/arch/arm64/kernel/pi/idreg-override.c
> index 4e76db6eb72c2087..6c547cccaf6a9e9c 100644
> --- a/arch/arm64/kernel/pi/idreg-override.c
> +++ b/arch/arm64/kernel/pi/idreg-override.c
> @@ -151,6 +151,7 @@ static const struct ftr_set_desc sw_features __prel64_initconst = {
>  	.override	= &arm64_sw_feature_override,
>  	.fields		= {
>  		FIELD("nokaslr", ARM64_SW_FEATURE_OVERRIDE_NOKASLR, NULL),
> +		FIELD("rodataoff", ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF, NULL),
>  		{}
>  	},
>  };
> @@ -183,6 +184,7 @@ static const struct {
>  	  "id_aa64isar2.gpa3=0 id_aa64isar2.apa3=0"	   },
>  	{ "arm64.nomte",		"id_aa64pfr1.mte=0" },
>  	{ "nokaslr",			"arm64_sw.nokaslr=1" },
> +	{ "rodata=off",			"arm64_sw.rodataoff=1" },
>  };
>  
>  static int __init parse_hexdigit(const char *p, u64 *v)
Ard Biesheuvel April 17, 2023, 2:30 p.m. UTC | #2 
On Mon, 17 Apr 2023 at 16:28, Ryan Roberts <ryan.roberts@arm.com> wrote:
>
> On 07/03/2023 14:04, Ard Biesheuvel wrote:
> > Add rodata=off to the set of kernel command line options that is parsed
> > early using the CPU feature override detection code, so we can easily
> > refer to it when creating the kernel mapping.
> >
> > Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> > ---
> >  arch/arm64/include/asm/cpufeature.h   | 1 +
> >  arch/arm64/kernel/pi/idreg-override.c | 2 ++
> >  2 files changed, 3 insertions(+)
> >
> > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> > index bc10098901808c00..edc7733aa49846b2 100644
> > --- a/arch/arm64/include/asm/cpufeature.h
> > +++ b/arch/arm64/include/asm/cpufeature.h
> > @@ -16,6 +16,7 @@
> >  #define cpu_feature(x)               KERNEL_HWCAP_ ## x
> >
> >  #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR    0
> > +#define ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF 4
>
> I assume these are bit numbers? Why not just use the next available bit (bit 1)
> for this new flag?
>

This (ab)uses the CPU feature framework, which is based on 4-bit
quantities. I don't remember if it matters or not, but IIRC the
default macros use 4-bit wide values.
Ryan Roberts April 17, 2023, 2:33 p.m. UTC | #3 
On 17/04/2023 15:30, Ard Biesheuvel wrote:
> On Mon, 17 Apr 2023 at 16:28, Ryan Roberts <ryan.roberts@arm.com> wrote:
>>
>> On 07/03/2023 14:04, Ard Biesheuvel wrote:
>>> Add rodata=off to the set of kernel command line options that is parsed
>>> early using the CPU feature override detection code, so we can easily
>>> refer to it when creating the kernel mapping.
>>>
>>> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
>>> ---
>>>  arch/arm64/include/asm/cpufeature.h   | 1 +
>>>  arch/arm64/kernel/pi/idreg-override.c | 2 ++
>>>  2 files changed, 3 insertions(+)
>>>
>>> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
>>> index bc10098901808c00..edc7733aa49846b2 100644
>>> --- a/arch/arm64/include/asm/cpufeature.h
>>> +++ b/arch/arm64/include/asm/cpufeature.h
>>> @@ -16,6 +16,7 @@
>>>  #define cpu_feature(x)               KERNEL_HWCAP_ ## x
>>>
>>>  #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR    0
>>> +#define ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF 4
>>
>> I assume these are bit numbers? Why not just use the next available bit (bit 1)
>> for this new flag?
>>
> 
> This (ab)uses the CPU feature framework, which is based on 4-bit
> quantities. I don't remember if it matters or not, but IIRC the
> default macros use 4-bit wide values.

OK, thanks.
diff mbox series

Patch

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index bc10098901808c00..edc7733aa49846b2 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -16,6 +16,7 @@ 
 #define cpu_feature(x)		KERNEL_HWCAP_ ## x
 
 #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR	0
+#define ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF	4
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm64/kernel/pi/idreg-override.c b/arch/arm64/kernel/pi/idreg-override.c
index 4e76db6eb72c2087..6c547cccaf6a9e9c 100644
--- a/arch/arm64/kernel/pi/idreg-override.c
+++ b/arch/arm64/kernel/pi/idreg-override.c
@@ -151,6 +151,7 @@  static const struct ftr_set_desc sw_features __prel64_initconst = {
 	.override	= &arm64_sw_feature_override,
 	.fields		= {
 		FIELD("nokaslr", ARM64_SW_FEATURE_OVERRIDE_NOKASLR, NULL),
+		FIELD("rodataoff", ARM64_SW_FEATURE_OVERRIDE_RODATA_OFF, NULL),
 		{}
 	},
 };
@@ -183,6 +184,7 @@  static const struct {
 	  "id_aa64isar2.gpa3=0 id_aa64isar2.apa3=0"	   },
 	{ "arm64.nomte",		"id_aa64pfr1.mte=0" },
 	{ "nokaslr",			"arm64_sw.nokaslr=1" },
+	{ "rodata=off",			"arm64_sw.rodataoff=1" },
 };
 
 static int __init parse_hexdigit(const char *p, u64 *v)