diff mbox series

opcodes: RX fix invalid output.

Message ID 20221026070009.3663574-1-ysato@users.sourceforge.jp
State Accepted
Headers
Series opcodes: RX fix invalid output. |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Yoshinori Sato Oct. 26, 2022, 7 a.m. UTC 
  The operands of the mvtcgu instruction were reversed.

* rx-decode.opc(rx_decode_opcode): mvtcgu swap operands.
* rx-decode.c: regenarate.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 opcodes/rx-decode.c   | 12 ++++++------
 opcodes/rx-decode.opc |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

Comments

Nick Clifton Oct. 31, 2022, 10:49 a.m. UTC | #1 
Hi Yoshinori,

> * rx-decode.opc(rx_decode_opcode): mvtcgu swap operands.
> * rx-decode.c: regenarate.

Patch approved and applied.

Note - I also had to update gas/testsuite/gas/rx/mvtacgu.d
to allow for the swapped operands.

Cheers
   Nick
diff mbox series

Patch

diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c
index 17fbcfcfe6c..8ccb12674a7 100644
--- a/opcodes/rx-decode.c
+++ b/opcodes/rx-decode.c
@@ -12476,22 +12476,22 @@  rx_decode_opcode (unsigned long pc AU,
                   break;
                 case 0x30:
                     {
-                      /** 1111 1101 0001 0111 a011 rdst	mvtacgu	%0, %1 */
+                      /** 1111 1101 0001 0111 a011 rsrc	mvtacgu	%1, %0 */
 #line 1110 "rx-decode.opc"
                       int a AU = (op[2] >> 7) & 0x01;
 #line 1110 "rx-decode.opc"
-                      int rdst AU = op[2] & 0x0f;
+                      int rsrc AU = op[2] & 0x0f;
                       if (trace)
                         {
                           printf ("\033[33m%s\033[0m  %02x %02x %02x\n",
-                                 "/** 1111 1101 0001 0111 a011 rdst	mvtacgu	%0, %1 */",
+                                 "/** 1111 1101 0001 0111 a011 rsrc	mvtacgu	%1, %0 */",
                                  op[0], op[1], op[2]);
                           printf ("  a = 0x%x,", a);
-                          printf ("  rdst = 0x%x\n", rdst);
+                          printf ("  rsrc = 0x%x\n", rsrc);
                         }
-                      SYNTAX("mvtacgu	%0, %1");
+                      SYNTAX("mvtacgu	%1, %0");
 #line 1110 "rx-decode.opc"
-                      ID(mvtacgu); DR(a+32); SR(rdst); F_____;
+                      ID(mvtacgu); SR(rsrc); DR(a+32); F_____;
 
                     }
                   break;
diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc
index 86effc39862..1b303ed8b19 100644
--- a/opcodes/rx-decode.opc
+++ b/opcodes/rx-decode.opc
@@ -1106,8 +1106,8 @@  rx_decode_opcode (unsigned long pc AU,
 /** 1111 1101 0001 111i a m11 rdst	mvfacgu	#%2, %1, %0 */
   ID(mvfacgu); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
 
-/** 1111 1101 0001 0111 a011 rdst	mvtacgu	%0, %1 */
-  ID(mvtacgu); DR(a+32); SR(rdst); F_____;
+/** 1111 1101 0001 0111 a011 rsrc	mvtacgu	%1, %0 */
+  ID(mvtacgu); SR(rsrc); DR(a+32); F_____;
 
 /** 1111 1101 0001 1001 a00i 0000	racl	#%1, %0 */
   ID(racl); SC(i+1); DR(a+32); F_____;