[RFC,4/5] arm64: dts: ti: Enable multiple MCAN for AM62x in MCU MCAN overlay

Message ID 20230413223051.24455-5-jm@ti.com
State New
Headers
Series Enable multiple MCAN on AM62x |

Commit Message

Judith Mendez April 13, 2023, 10:30 p.m. UTC
  Enable two MCAN in MCU domain. AM62x does not have on-board CAN
transcievers, so instead of changing the DTB permanently, add
MCU MCAN nodes and transceiver nodes to a MCU MCAN overlay.

If there are no hardware interrupts rounted to the GIC interrupt
controller for MCAN IP, A53 Linux will not receive hardware
interrupts. If an hrtimer is used to generate software interrupts,
the two required interrupt attributes in the MCAN node do not have
to be included.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/Makefile               |  2 +-
 .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso     | 75 +++++++++++++++++++
 2 files changed, 76 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
  

Comments

Krzysztof Kozlowski April 14, 2023, 8:01 a.m. UTC | #1
On 14/04/2023 00:30, Judith Mendez wrote:
> Enable two MCAN in MCU domain. AM62x does not have on-board CAN
> transcievers, so instead of changing the DTB permanently, add
> MCU MCAN nodes and transceiver nodes to a MCU MCAN overlay.
> 
> If there are no hardware interrupts rounted to the GIC interrupt
> controller for MCAN IP, A53 Linux will not receive hardware
> interrupts. If an hrtimer is used to generate software interrupts,
> the two required interrupt attributes in the MCAN node do not have
> to be included.
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  arch/arm64/boot/dts/ti/Makefile               |  2 +-
>  .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso     | 75 +++++++++++++++++++
>  2 files changed, 76 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> 
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index abe15e76b614..c76be3888e4d 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -9,7 +9,7 @@
>  # alphabetically.
>  
>  # Boards with AM62x SoC
> -k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo
> +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo
>  dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
>  dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
>  dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb
> diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> new file mode 100644
> index 000000000000..777705aea546
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/**
> + * DT overlay for MCAN in MCU domain on AM625 SK
> + *
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/pinctrl/k3.h>
> +#include <dt-bindings/soc/ti,sci_pm_domain.h>
> +
> +
> +&{/} {
> +	transceiver2: can-phy1 {
> +		compatible = "ti,tcan1042";
> +		#phy-cells = <0>;
> +		max-bitrate = <5000000>;
> +	};
> +
> +	transceiver3: can-phy2 {
> +		compatible = "ti,tcan1042";
> +		#phy-cells = <0>;
> +		max-bitrate = <5000000>;
> +	};
> +};
> +
> +&mcu_pmx0 {
> +	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
> +		pinctrl-single,pins = <
> +			AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
> +			AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
> +		>;
> +	};
> +
> +	mcu_mcan2_pins_default: mcu-mcan2-pins-default {
> +		pinctrl-single,pins = <
> +			AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
> +			AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
> +		>;
> +	};
> +};
> +
> +&cbass_mcu {
> +	mcu_mcan1: can@4e00000 {
> +		compatible = "bosch,m_can";
> +		reg = <0x00 0x4e00000 0x00 0x8000>,
> +			  <0x00 0x4e08000 0x00 0x200>;
> +		reg-names = "message_ram", "m_can";
> +		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> +		clock-names = "hclk", "cclk";
> +		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&mcu_mcan1_pins_default>;
> +		phys = <&transceiver2>;
> +		status = "okay";

okay is by default. Why do you need it?



Best regards,
Krzysztof
  
Nishanth Menon April 14, 2023, 6:29 p.m. UTC | #2
On 10:01-20230414, Krzysztof Kozlowski wrote:
> On 14/04/2023 00:30, Judith Mendez wrote:
> > Enable two MCAN in MCU domain. AM62x does not have on-board CAN
> > transcievers, so instead of changing the DTB permanently, add
> > MCU MCAN nodes and transceiver nodes to a MCU MCAN overlay.
> > 
> > If there are no hardware interrupts rounted to the GIC interrupt
> > controller for MCAN IP, A53 Linux will not receive hardware
> > interrupts. If an hrtimer is used to generate software interrupts,
> > the two required interrupt attributes in the MCAN node do not have
> > to be included.
> > 
> > Signed-off-by: Judith Mendez <jm@ti.com>
> > ---
> >  arch/arm64/boot/dts/ti/Makefile               |  2 +-
> >  .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso     | 75 +++++++++++++++++++
> >  2 files changed, 76 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> > 
> > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> > index abe15e76b614..c76be3888e4d 100644
> > --- a/arch/arm64/boot/dts/ti/Makefile
> > +++ b/arch/arm64/boot/dts/ti/Makefile
> > @@ -9,7 +9,7 @@
> >  # alphabetically.
> >  
> >  # Boards with AM62x SoC
> > -k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo
> > +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo
> >  dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
> >  dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
> >  dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb
> > diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> > new file mode 100644
> > index 000000000000..777705aea546
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> > @@ -0,0 +1,75 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/**
> > + * DT overlay for MCAN in MCU domain on AM625 SK
> > + *
> > + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#include <dt-bindings/pinctrl/k3.h>
> > +#include <dt-bindings/soc/ti,sci_pm_domain.h>

NAK.

> > +
> > +
> > +&{/} {
> > +	transceiver2: can-phy1 {
> > +		compatible = "ti,tcan1042";
> > +		#phy-cells = <0>;
> > +		max-bitrate = <5000000>;
> > +	};
> > +
> > +	transceiver3: can-phy2 {
> > +		compatible = "ti,tcan1042";
> > +		#phy-cells = <0>;
> > +		max-bitrate = <5000000>;
> > +	};
> > +};
> > +
> > +&mcu_pmx0 {
> > +	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
> > +		pinctrl-single,pins = <
> > +			AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
> > +			AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
> > +		>;
> > +	};
> > +
> > +	mcu_mcan2_pins_default: mcu-mcan2-pins-default {
> > +		pinctrl-single,pins = <
> > +			AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
> > +			AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
> > +		>;
> > +	};
> > +};
> > +
> > +&cbass_mcu {
> > +	mcu_mcan1: can@4e00000 {
> > +		compatible = "bosch,m_can";
> > +		reg = <0x00 0x4e00000 0x00 0x8000>,
> > +			  <0x00 0x4e08000 0x00 0x200>;
> > +		reg-names = "message_ram", "m_can";
> > +		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> > +		clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> > +		clock-names = "hclk", "cclk";
> > +		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&mcu_mcan1_pins_default>;
> > +		phys = <&transceiver2>;
> > +		status = "okay";
> 
> okay is by default. Why do you need it?

mcan is not functional without pinmux, so it has been disabled by
default in SoC. this overlay is supposed to enable it. But this is done
entirely wrongly.


The mcu_mcan1 should first be added to the SoC.dtsi as disabled, then
set to okay with pinctrl and  transciever in the overlay.
  
Krzysztof Kozlowski April 14, 2023, 8:44 p.m. UTC | #3
On 14/04/2023 20:29, Nishanth Menon wrote:
>>> +
>>> +&cbass_mcu {
>>> +	mcu_mcan1: can@4e00000 {
>>> +		compatible = "bosch,m_can";
>>> +		reg = <0x00 0x4e00000 0x00 0x8000>,
>>> +			  <0x00 0x4e08000 0x00 0x200>;
>>> +		reg-names = "message_ram", "m_can";
>>> +		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
>>> +		clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
>>> +		clock-names = "hclk", "cclk";
>>> +		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
>>> +		pinctrl-names = "default";
>>> +		pinctrl-0 = <&mcu_mcan1_pins_default>;
>>> +		phys = <&transceiver2>;
>>> +		status = "okay";
>>
>> okay is by default. Why do you need it?
> 
> mcan is not functional without pinmux, so it has been disabled by
> default in SoC. this overlay is supposed to enable it. But this is done
> entirely wrongly.

Ah, so this is override of existing node? Why not overriding by
label/phandle?

Best regards,
Krzysztof
  
Nishanth Menon April 14, 2023, 10:11 p.m. UTC | #4
On 22:44-20230414, Krzysztof Kozlowski wrote:
> On 14/04/2023 20:29, Nishanth Menon wrote:
> >>> +
> >>> +&cbass_mcu {
> >>> +	mcu_mcan1: can@4e00000 {
> >>> +		compatible = "bosch,m_can";
> >>> +		reg = <0x00 0x4e00000 0x00 0x8000>,
> >>> +			  <0x00 0x4e08000 0x00 0x200>;
> >>> +		reg-names = "message_ram", "m_can";
> >>> +		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> >>> +		clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> >>> +		clock-names = "hclk", "cclk";
> >>> +		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> >>> +		pinctrl-names = "default";
> >>> +		pinctrl-0 = <&mcu_mcan1_pins_default>;
> >>> +		phys = <&transceiver2>;
> >>> +		status = "okay";
> >>
> >> okay is by default. Why do you need it?
> > 
> > mcan is not functional without pinmux, so it has been disabled by
> > default in SoC. this overlay is supposed to enable it. But this is done
> > entirely wrongly.
> 
> Ah, so this is override of existing node? Why not overriding by
> label/phandle?

Yep, that is how it should be done (as every other node is done for
mcan):
a) SoC.dtsi -> introduce mcu_mcan1, disabled since no transciever or
pinmux, set status = "disabled";
b) overlay -> use the label and provide the missing properties, set
status = "okay";

The series definitely needs a respin.
  
Judith Mendez April 19, 2023, 3:54 p.m. UTC | #5
Hello, all

On 4/14/2023 5:11 PM, Nishanth Menon wrote:
> On 22:44-20230414, Krzysztof Kozlowski wrote:
>> On 14/04/2023 20:29, Nishanth Menon wrote:
>>>>> +
>>>>> +&cbass_mcu {
>>>>> +	mcu_mcan1: can@4e00000 {
>>>>> +		compatible = "bosch,m_can";
>>>>> +		reg = <0x00 0x4e00000 0x00 0x8000>,
>>>>> +			  <0x00 0x4e08000 0x00 0x200>;
>>>>> +		reg-names = "message_ram", "m_can";
>>>>> +		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
>>>>> +		clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
>>>>> +		clock-names = "hclk", "cclk";
>>>>> +		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
>>>>> +		pinctrl-names = "default";
>>>>> +		pinctrl-0 = <&mcu_mcan1_pins_default>;
>>>>> +		phys = <&transceiver2>;
>>>>> +		status = "okay";
>>>>
>>>> okay is by default. Why do you need it?
>>>
>>> mcan is not functional without pinmux, so it has been disabled by
>>> default in SoC. this overlay is supposed to enable it. But this is done
>>> entirely wrongly.
>>
>> Ah, so this is override of existing node? Why not overriding by
>> label/phandle?
> 
> Yep, that is how it should be done (as every other node is done for
> mcan):
> a) SoC.dtsi -> introduce mcu_mcan1, disabled since no transciever or
> pinmux, set status = "disabled";
> b) overlay -> use the label and provide the missing properties, set
> status = "okay";
> 
> The series definitely needs a respin.
> 

Thanks for your feedback, I will definitely fix and send out a v2 with 
this update.

Thanks,
Judith
  

Patch

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index abe15e76b614..c76be3888e4d 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -9,7 +9,7 @@ 
 # alphabetically.
 
 # Boards with AM62x SoC
-k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo
+k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb
diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
new file mode 100644
index 000000000000..777705aea546
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
@@ -0,0 +1,75 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * DT overlay for MCAN in MCU domain on AM625 SK
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/k3.h>
+#include <dt-bindings/soc/ti,sci_pm_domain.h>
+
+
+&{/} {
+	transceiver2: can-phy1 {
+		compatible = "ti,tcan1042";
+		#phy-cells = <0>;
+		max-bitrate = <5000000>;
+	};
+
+	transceiver3: can-phy2 {
+		compatible = "ti,tcan1042";
+		#phy-cells = <0>;
+		max-bitrate = <5000000>;
+	};
+};
+
+&mcu_pmx0 {
+	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
+		pinctrl-single,pins = <
+			AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
+			AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
+		>;
+	};
+
+	mcu_mcan2_pins_default: mcu-mcan2-pins-default {
+		pinctrl-single,pins = <
+			AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
+			AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
+		>;
+	};
+};
+
+&cbass_mcu {
+	mcu_mcan1: can@4e00000 {
+		compatible = "bosch,m_can";
+		reg = <0x00 0x4e00000 0x00 0x8000>,
+			  <0x00 0x4e08000 0x00 0x200>;
+		reg-names = "message_ram", "m_can";
+		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
+		clock-names = "hclk", "cclk";
+		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&mcu_mcan1_pins_default>;
+		phys = <&transceiver2>;
+		status = "okay";
+	};
+
+	mcu_mcan2: can@4e10000 {
+		compatible = "bosch,m_can";
+		reg = <0x00 0x4e10000 0x00 0x8000>,
+			  <0x00 0x4e18000 0x00 0x200>;
+		reg-names = "message_ram", "m_can";
+		power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
+		clock-names = "hclk", "cclk";
+		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&mcu_mcan2_pins_default>;
+		phys = <&transceiver3>;
+		status = "okay";
+	};
+};