drm/ast: Fix long time waiting on s3/s4 resume
Commit Message
In resume, DP's launch function, ast_dp_launch, could wait at most 30
seconds before timeout to check if DP is enabled.
To avoid this problem, we only check if DP enable or not at driver probe.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217278
Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
---
drivers/gpu/drm/ast/ast_dp.c | 53 ++++++++++------------------------
drivers/gpu/drm/ast/ast_drv.h | 2 +-
drivers/gpu/drm/ast/ast_main.c | 11 +++++--
drivers/gpu/drm/ast/ast_post.c | 3 +-
4 files changed, 28 insertions(+), 41 deletions(-)
base-commit: e62252bc55b6d4eddc6c2bdbf95a448180d6a08d
Comments
Hi Jammy,
kernel test robot noticed the following build errors:
[auto build test ERROR on e62252bc55b6d4eddc6c2bdbf95a448180d6a08d]
url: https://github.com/intel-lab-lkp/linux/commits/Jammy-Huang/drm-ast-Fix-long-time-waiting-on-s3-s4-resume/20230414-091312
base: e62252bc55b6d4eddc6c2bdbf95a448180d6a08d
patch link: https://lore.kernel.org/r/20230414011147.3858-1-jammy_huang%40aspeedtech.com
patch subject: [PATCH] drm/ast: Fix long time waiting on s3/s4 resume
config: ia64-allyesconfig (https://download.01.org/0day-ci/archive/20230414/202304141155.Hsgy2cN0-lkp@intel.com/config)
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/120de3fe25a450d9918de8bc73a4fe079bc71d9c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jammy-Huang/drm-ast-Fix-long-time-waiting-on-s3-s4-resume/20230414-091312
git checkout 120de3fe25a450d9918de8bc73a4fe079bc71d9c
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/gpu/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202304141155.Hsgy2cN0-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/ast/ast_dp.c:122:6: error: conflicting types for 'ast_dp_launch'; have 'void(struct drm_device *, u8)' {aka 'void(struct drm_device *, unsigned char)'}
122 | void ast_dp_launch(struct drm_device *dev, u8 bPower)
| ^~~~~~~~~~~~~
In file included from drivers/gpu/drm/ast/ast_dp.c:8:
drivers/gpu/drm/ast/ast_drv.h:501:6: note: previous declaration of 'ast_dp_launch' with type 'void(struct drm_device *)'
501 | void ast_dp_launch(struct drm_device *dev);
| ^~~~~~~~~~~~~
vim +122 drivers/gpu/drm/ast/ast_dp.c
594e9c04b5864b KuoHsiang Chou 2022-04-28 118
594e9c04b5864b KuoHsiang Chou 2022-04-28 119 /*
594e9c04b5864b KuoHsiang Chou 2022-04-28 120 * Launch Aspeed DP
594e9c04b5864b KuoHsiang Chou 2022-04-28 121 */
594e9c04b5864b KuoHsiang Chou 2022-04-28 @122 void ast_dp_launch(struct drm_device *dev, u8 bPower)
594e9c04b5864b KuoHsiang Chou 2022-04-28 123 {
120de3fe25a450 Jammy Huang 2023-04-14 124 u32 i = 0;
594e9c04b5864b KuoHsiang Chou 2022-04-28 125 u8 bDPExecute = 1;
594e9c04b5864b KuoHsiang Chou 2022-04-28 126 struct ast_private *ast = to_ast_private(dev);
594e9c04b5864b KuoHsiang Chou 2022-04-28 127
594e9c04b5864b KuoHsiang Chou 2022-04-28 128 // Wait one second then timeout.
594e9c04b5864b KuoHsiang Chou 2022-04-28 129 while (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, COPROCESSOR_LAUNCH) !=
594e9c04b5864b KuoHsiang Chou 2022-04-28 130 COPROCESSOR_LAUNCH) {
594e9c04b5864b KuoHsiang Chou 2022-04-28 131 i++;
594e9c04b5864b KuoHsiang Chou 2022-04-28 132 // wait 100 ms
594e9c04b5864b KuoHsiang Chou 2022-04-28 133 msleep(100);
594e9c04b5864b KuoHsiang Chou 2022-04-28 134
594e9c04b5864b KuoHsiang Chou 2022-04-28 135 if (i >= 10) {
594e9c04b5864b KuoHsiang Chou 2022-04-28 136 // DP would not be ready.
594e9c04b5864b KuoHsiang Chou 2022-04-28 137 bDPExecute = 0;
594e9c04b5864b KuoHsiang Chou 2022-04-28 138 break;
594e9c04b5864b KuoHsiang Chou 2022-04-28 139 }
594e9c04b5864b KuoHsiang Chou 2022-04-28 140 }
594e9c04b5864b KuoHsiang Chou 2022-04-28 141
120de3fe25a450 Jammy Huang 2023-04-14 142 if (!bDPExecute)
120de3fe25a450 Jammy Huang 2023-04-14 143 drm_err(dev, "Wait DPMCU executing timeout\n");
594e9c04b5864b KuoHsiang Chou 2022-04-28 144
594e9c04b5864b KuoHsiang Chou 2022-04-28 145 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xE5,
594e9c04b5864b KuoHsiang Chou 2022-04-28 146 (u8) ~ASTDP_HOST_EDID_READ_DONE_MASK,
594e9c04b5864b KuoHsiang Chou 2022-04-28 147 ASTDP_HOST_EDID_READ_DONE);
7f35680ada234c Thomas Zimmermann 2022-06-07 148 }
594e9c04b5864b KuoHsiang Chou 2022-04-28 149
@@ -121,51 +121,30 @@ int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata)
*/
void ast_dp_launch(struct drm_device *dev, u8 bPower)
{
- u32 i = 0, j = 0, WaitCount = 1;
- u8 bDPTX = 0;
+ u32 i = 0;
u8 bDPExecute = 1;
-
struct ast_private *ast = to_ast_private(dev);
- // S3 come back, need more time to wait BMC ready.
- if (bPower)
- WaitCount = 300;
-
-
- // Wait total count by different condition.
- for (j = 0; j < WaitCount; j++) {
- bDPTX = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, TX_TYPE_MASK);
-
- if (bDPTX)
- break;
+ // Wait one second then timeout.
+ while (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, COPROCESSOR_LAUNCH) !=
+ COPROCESSOR_LAUNCH) {
+ i++;
+ // wait 100 ms
msleep(100);
- }
- // 0xE : ASTDP with DPMCU FW handling
- if (bDPTX == ASTDP_DPMCU_TX) {
- // Wait one second then timeout.
- i = 0;
-
- while (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, COPROCESSOR_LAUNCH) !=
- COPROCESSOR_LAUNCH) {
- i++;
- // wait 100 ms
- msleep(100);
-
- if (i >= 10) {
- // DP would not be ready.
- bDPExecute = 0;
- break;
- }
+ if (i >= 10) {
+ // DP would not be ready.
+ bDPExecute = 0;
+ break;
}
+ }
- if (bDPExecute)
- ast->tx_chip_types |= BIT(AST_TX_ASTDP);
+ if (!bDPExecute)
+ drm_err(dev, "Wait DPMCU executing timeout\n");
- ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xE5,
- (u8) ~ASTDP_HOST_EDID_READ_DONE_MASK,
- ASTDP_HOST_EDID_READ_DONE);
- }
+ ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xE5,
+ (u8) ~ASTDP_HOST_EDID_READ_DONE_MASK,
+ ASTDP_HOST_EDID_READ_DONE);
}
@@ -498,7 +498,7 @@ struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
/* aspeed DP */
int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata);
-void ast_dp_launch(struct drm_device *dev, u8 bPower);
+void ast_dp_launch(struct drm_device *dev);
void ast_dp_power_on_off(struct drm_device *dev, bool no);
void ast_dp_set_on_off(struct drm_device *dev, bool no);
void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode);
@@ -254,8 +254,13 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
case 0x0c:
ast->tx_chip_types = AST_TX_DP501_BIT;
}
- } else if (ast->chip == AST2600)
- ast_dp_launch(&ast->base, 0);
+ } else if (ast->chip == AST2600) {
+ if (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, TX_TYPE_MASK) ==
+ ASTDP_DPMCU_TX) {
+ ast->tx_chip_types = AST_TX_ASTDP_BIT;
+ ast_dp_launch(&ast->base);
+ }
+ }
/* Print stuff for diagnostic purposes */
if (ast->tx_chip_types & AST_TX_NONE_BIT)
@@ -264,6 +269,8 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
drm_info(dev, "Using Sil164 TMDS transmitter\n");
if (ast->tx_chip_types & AST_TX_DP501_BIT)
drm_info(dev, "Using DP501 DisplayPort transmitter\n");
+ if (ast->tx_chip_types & AST_TX_ASTDP_BIT)
+ drm_info(dev, "Using ASPEED DisplayPort transmitter\n");
return 0;
}
@@ -380,7 +380,8 @@ void ast_post_gpu(struct drm_device *dev)
ast_set_def_ext_reg(dev);
if (ast->chip == AST2600) {
- ast_dp_launch(dev, 1);
+ if (ast->tx_chip_types & AST_TX_ASTDP_BIT)
+ ast_dp_launch(dev);
} else if (ast->config_mode == ast_use_p2a) {
if (ast->chip == AST2500)
ast_post_chip_2500(dev);