diff mbox series

loop-iv: Fix up bounds computation

Message ID ZDgHd4qtTuRk3r7H@tucnak
State Unresolved
Headers
Series loop-iv: Fix up bounds computation |

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Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Jakub Jelinek April 13, 2023, 1:45 p.m. UTC 
  On Thu, Apr 13, 2023 at 06:35:07AM -0600, Jeff Law wrote:
> Bootstrap was successful with v3, but there's hundreds of testsuite failures
> due to the simplify-rtx hunk.  compile/20070520-1.c for example when
> compiled with:  -O3 -funroll-loops -march=rv64gc -mabi=lp64d
> 
> Thursdays are my hell day.  It's unlikely I'd be able to look at this at all
> today.

So, seems to me this is because loop-iv.cc asks for invalid RTL to be
simplified, it calls simplify_gen_binary (AND, SImode,
(subreg:SI (plus:DI (reg:DI 289 [ ivtmp_312 ])
        (const_int 4294967295 [0xffffffff])) 0),
(const_int 4294967295 [0xffffffff]))
but 0xffffffff is not valid SImode CONST_INT, and unlike previously
we no longer on WORD_REGISTER_OPERATIONS targets which have DImode
word_mode optimize that into the op0, so the invalid constant is emitted
into the IL and checking fails.

The following patch fixes that (and we optimize that & -1 away even earlier
with that).

Could you please just quickly try to apply this patch, make in the stage3
directory followed by
make check-gcc RUNTESTFLAGS="... compile.exp='20070520-1.c ...'"
(with all tests that regressed previously), whether this is the only spot
or whether we need to fix some other place too?

2023-04-13  Jakub Jelinek  <jakub@redhat.com>

	* loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
	of GEN_INT.



	Jakub

Comments

Jeff Law April 13, 2023, 3:07 p.m. UTC | #1 
On 4/13/23 07:45, Jakub Jelinek wrote:
> On Thu, Apr 13, 2023 at 06:35:07AM -0600, Jeff Law wrote:
>> Bootstrap was successful with v3, but there's hundreds of testsuite failures
>> due to the simplify-rtx hunk.  compile/20070520-1.c for example when
>> compiled with:  -O3 -funroll-loops -march=rv64gc -mabi=lp64d
>>
>> Thursdays are my hell day.  It's unlikely I'd be able to look at this at all
>> today.
> 
> So, seems to me this is because loop-iv.cc asks for invalid RTL to be
> simplified, it calls simplify_gen_binary (AND, SImode,
> (subreg:SI (plus:DI (reg:DI 289 [ ivtmp_312 ])
>          (const_int 4294967295 [0xffffffff])) 0),
> (const_int 4294967295 [0xffffffff]))
> but 0xffffffff is not valid SImode CONST_INT, and unlike previously
> we no longer on WORD_REGISTER_OPERATIONS targets which have DImode
> word_mode optimize that into the op0, so the invalid constant is emitted
> into the IL and checking fails.
> 
> The following patch fixes that (and we optimize that & -1 away even earlier
> with that).
> 
> Could you please just quickly try to apply this patch, make in the stage3
> directory followed by
> make check-gcc RUNTESTFLAGS="... compile.exp='20070520-1.c ...'"
> (with all tests that regressed previously), whether this is the only spot
> or whether we need to fix some other place too?
> 
> 2023-04-13  Jakub Jelinek  <jakub@redhat.com>
> 
> 	* loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
> 	of GEN_INT.
I'll try to apply this and do just an incremental build & test to see if 
it resolves all the regressions.  It should complete while I'm in my 
meeting hell.

jeff
Jeff Law April 13, 2023, 7:37 p.m. UTC | #2 
On 4/13/23 07:45, Jakub Jelinek wrote:
> On Thu, Apr 13, 2023 at 06:35:07AM -0600, Jeff Law wrote:
>> Bootstrap was successful with v3, but there's hundreds of testsuite failures
>> due to the simplify-rtx hunk.  compile/20070520-1.c for example when
>> compiled with:  -O3 -funroll-loops -march=rv64gc -mabi=lp64d
>>
>> Thursdays are my hell day.  It's unlikely I'd be able to look at this at all
>> today.
> 
> So, seems to me this is because loop-iv.cc asks for invalid RTL to be
> simplified, it calls simplify_gen_binary (AND, SImode,
> (subreg:SI (plus:DI (reg:DI 289 [ ivtmp_312 ])
>          (const_int 4294967295 [0xffffffff])) 0),
> (const_int 4294967295 [0xffffffff]))
> but 0xffffffff is not valid SImode CONST_INT, and unlike previously
> we no longer on WORD_REGISTER_OPERATIONS targets which have DImode
> word_mode optimize that into the op0, so the invalid constant is emitted
> into the IL and checking fails.
> 
> The following patch fixes that (and we optimize that & -1 away even earlier
> with that).
> 
> Could you please just quickly try to apply this patch, make in the stage3
> directory followed by
> make check-gcc RUNTESTFLAGS="... compile.exp='20070520-1.c ...'"
> (with all tests that regressed previously), whether this is the only spot
> or whether we need to fix some other place too?
> 
> 2023-04-13  Jakub Jelinek  <jakub@redhat.com>
> 
> 	* loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
> 	of GEN_INT.
That fixes all the regressions and looks OK to me.

jeff
diff mbox series

Patch

--- gcc/loop-iv.cc.jj	2023-01-02 09:32:23.000000000 +0100
+++ gcc/loop-iv.cc	2023-04-13 15:34:11.939045804 +0200
@@ -2617,7 +2617,7 @@  iv_number_of_iterations (class loop *loo
 	  d *= 2;
 	  size--;
 	}
-      bound = GEN_INT (((uint64_t) 1 << (size - 1 ) << 1) - 1);
+      bound = gen_int_mode (((uint64_t) 1 << (size - 1) << 1) - 1, mode);
 
       tmp1 = lowpart_subreg (mode, iv1.base, comp_mode);
       tmp = simplify_gen_binary (UMOD, mode, tmp1, gen_int_mode (d, mode));