[net-next,v7,6/6] docs: octeontx2: Add Documentation for QOS

Message ID 20230410072910.5632-7-hkelam@marvell.com
State New
Headers
Series [net-next,v7,1/6] sch_htb: Allow HTB priority parameter in offload mode |

Commit Message

Hariprasad Kelam April 10, 2023, 7:29 a.m. UTC
  Add QOS example configuration along with tc-htb commands

Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
---
 .../ethernet/marvell/octeontx2.rst            | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)
  

Comments

Jacob Keller April 12, 2023, 11:16 p.m. UTC | #1
On 4/10/2023 12:29 AM, Hariprasad Kelam wrote:
> Add QOS example configuration along with tc-htb commands
> 
> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
> Reviewed-by: Simon Horman <simon.horman@corigine.com>
> ---
>  .../ethernet/marvell/octeontx2.rst            | 39 +++++++++++++++++++
>  1 file changed, 39 insertions(+)
> 
> diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
> index 5ba9015336e2..eca4309964c8 100644
> --- a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
> +++ b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
> @@ -13,6 +13,7 @@ Contents
>  - `Drivers`_
>  - `Basic packet flow`_
>  - `Devlink health reporters`_
> +- `Quality of service`_
>  
>  Overview
>  ========
> @@ -287,3 +288,41 @@ For example::
>  	 NIX_AF_ERR:
>  	        NIX Error Interrupt Reg : 64
>  	        Rx on unmapped PF_FUNC
> +
> +
> +Quality of service
> +==================
> +
> +octeontx2 silicon and CN10K transmit interface consists of five transmit levels starting from SMQ/MDQ, TL4 to TL1.
> +The hardware uses the below algorithms depending on the priority of scheduler queues
> +
> +1. Strict Priority
> +
> +      -  Once packets are submitted to MDQ, hardware picks all active MDQs having different priority
> +         using strict priority.
> +
> +2. Round Robin
> +
> +      - Active MDQs having the same priority level are chosen using round robin.
> +
> +3. Each packet will traverse MDQ, TL4 to TL1 levels. Each level contains an array of queues to support scheduling and
> +   shaping.
> +
> +4. once the user creates tc classes with different priority
> +
> +   -  Driver configures schedulers allocated to the class with specified priority along with rate-limiting configuration.
> +
> +5. Enable HW TC offload on the interface::
> +
> +        # ethtool -K <interface> hw-tc-offload on
> +
> +6. Crate htb root::
> +
> +        # tc qdisc add dev <interface> clsact
> +        # tc qdisc replace dev <interface> root handle 1: htb offload
> +
> +7. Create tc classes with different  priorities::
> +
> +        # tc class add dev <interface> parent 1: classid 1:1 htb rate 10Gbit prio 1
> +
> +        # tc class add dev <interface> parent 1: classid 1:2 htb rate 10Gbit prio 7


This part of the doc is confusing. It starts by reading like a list of
algorithms, then transitions into a list of instructions. I think those
should be separated into two pieces, one with the explanation and one
with some example how to set it up.
  

Patch

diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
index 5ba9015336e2..eca4309964c8 100644
--- a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
+++ b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
@@ -13,6 +13,7 @@  Contents
 - `Drivers`_
 - `Basic packet flow`_
 - `Devlink health reporters`_
+- `Quality of service`_
 
 Overview
 ========
@@ -287,3 +288,41 @@  For example::
 	 NIX_AF_ERR:
 	        NIX Error Interrupt Reg : 64
 	        Rx on unmapped PF_FUNC
+
+
+Quality of service
+==================
+
+octeontx2 silicon and CN10K transmit interface consists of five transmit levels starting from SMQ/MDQ, TL4 to TL1.
+The hardware uses the below algorithms depending on the priority of scheduler queues
+
+1. Strict Priority
+
+      -  Once packets are submitted to MDQ, hardware picks all active MDQs having different priority
+         using strict priority.
+
+2. Round Robin
+
+      - Active MDQs having the same priority level are chosen using round robin.
+
+3. Each packet will traverse MDQ, TL4 to TL1 levels. Each level contains an array of queues to support scheduling and
+   shaping.
+
+4. once the user creates tc classes with different priority
+
+   -  Driver configures schedulers allocated to the class with specified priority along with rate-limiting configuration.
+
+5. Enable HW TC offload on the interface::
+
+        # ethtool -K <interface> hw-tc-offload on
+
+6. Crate htb root::
+
+        # tc qdisc add dev <interface> clsact
+        # tc qdisc replace dev <interface> root handle 1: htb offload
+
+7. Create tc classes with different  priorities::
+
+        # tc class add dev <interface> parent 1: classid 1:1 htb rate 10Gbit prio 1
+
+        # tc class add dev <interface> parent 1: classid 1:2 htb rate 10Gbit prio 7