[01/40] dt-bindings: pinctrl: qcom,ipq5332-tlmm: simplify with unevaluatedProperties
Message ID | 20230407184546.161168-1-krzysztof.kozlowski@linaro.org |
---|---|
State | New |
Headers |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r21-20020a17090b051500b0023747b24923si3250874pjz.53.2023.04.07.12.08.56; Fri, 07 Apr 2023 12:09:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230430AbjDGSqB (ORCPT <rfc822;a1648639935@gmail.com> + 99 others); Fri, 7 Apr 2023 14:46:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230359AbjDGSp7 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 7 Apr 2023 14:45:59 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54EB7BB8F; Fri, 7 Apr 2023 11:45:58 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DC8B7652A9; Fri, 7 Apr 2023 18:45:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 693C4C433D2; Fri, 7 Apr 2023 18:45:52 +0000 (UTC) From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Stephan Gerhold <stephan@gerhold.net>, Shawn Guo <shawn.guo@linaro.org>, Melody Olvera <quic_molvera@quicinc.com>, Bartosz Golaszewski <bartosz.golaszewski@linaro.org>, Richard Acayan <mailingradian@gmail.com>, Vinod Koul <vkoul@kernel.org>, krishna Lanka <quic_vamslank@quicinc.com>, Iskren Chernev <me@iskren.info>, Martin Botka <martin.botka@somainline.org>, Danila Tikhonov <danila@jiaxyga.com>, Abel Vesa <abel.vesa@linaro.org>, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH 01/40] dt-bindings: pinctrl: qcom,ipq5332-tlmm: simplify with unevaluatedProperties Date: Fri, 7 Apr 2023 20:45:07 +0200 Message-Id: <20230407184546.161168-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762545713431536593?= X-GMAIL-MSGID: =?utf-8?q?1762545713431536593?= |
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[01/40] dt-bindings: pinctrl: qcom,ipq5332-tlmm: simplify with unevaluatedProperties
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Commit Message
Krzysztof Kozlowski
April 7, 2023, 6:45 p.m. UTC
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/pinctrl/qcom,ipq5332-tlmm.yaml | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
Comments
On 07/04/2023 20:45, Krzysztof Kozlowski wrote: > All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar > capabilities regarding pin properties, thus we can just accept entire > set provided by qcom,tlmm-common.yaml schema. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Linus, If you prefer I can send all these to you in a pull after getting some acks. Rob, Feel free to ack once for all of them. Best regards, Krzysztof
On Fri, Apr 7, 2023 at 8:54 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 07/04/2023 20:45, Krzysztof Kozlowski wrote: > > All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar > > capabilities regarding pin properties, thus we can just accept entire > > set provided by qcom,tlmm-common.yaml schema. > > > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Linus, > > If you prefer I can send all these to you in a pull after getting some acks. That would be best, thanks! Also the refactoring looks nice. Yours, Linus Walleij
On Fri, Apr 07, 2023 at 08:54:43PM +0200, Krzysztof Kozlowski wrote: > On 07/04/2023 20:45, Krzysztof Kozlowski wrote: > > All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar > > capabilities regarding pin properties, thus we can just accept entire > > set provided by qcom,tlmm-common.yaml schema. > > > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Linus, > > If you prefer I can send all these to you in a pull after getting some acks. > > > Rob, > > Feel free to ack once for all of them. There's no cover letter to ack them all (and b4 to pick up), but I guess that's your own problem in this case. For the series: Acked-by: Rob Herring <robh@kernel.org> IMO, this should just be 1 patch. It's 1 change for 1 platform family for 1 subsystem. There's just no point when it's all the same people that will review it and apply it. Rob
On 11/04/2023 19:35, Rob Herring wrote: > On Fri, Apr 07, 2023 at 08:54:43PM +0200, Krzysztof Kozlowski wrote: >> On 07/04/2023 20:45, Krzysztof Kozlowski wrote: >>> All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar >>> capabilities regarding pin properties, thus we can just accept entire >>> set provided by qcom,tlmm-common.yaml schema. >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>> --- >> >> Linus, >> >> If you prefer I can send all these to you in a pull after getting some acks. >> >> >> Rob, >> >> Feel free to ack once for all of them. > > There's no cover letter to ack them all (and b4 to pick up), but I guess > that's your own problem in this case. For the series: > > Acked-by: Rob Herring <robh@kernel.org> > > IMO, this should just be 1 patch. It's 1 change for 1 platform family > for 1 subsystem. There's just no point when it's all the same people > that will review it and apply it. My previous patches of approximately this size were bouncing from the lists, so I wanted to avoid this. Also, some of the bindings actually have different maintainers. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml index 300747252a7b..3d3086ae1ba6 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml @@ -56,6 +56,7 @@ $defs: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false properties: pins: @@ -92,19 +93,9 @@ $defs: rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci_txd, wci_rxd, wsi_clk, wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem ] - bias-pull-down: true - bias-pull-up: true - bias-disable: true - drive-strength: true - input-enable: true - output-high: true - output-low: true - required: - pins - additionalProperties: false - required: - compatible - reg